IDT72V36102 IDT [Integrated Device Technology], IDT72V36102 Datasheet - Page 20

• Manufacturer Part Number: IDT72V36102
• Description: 3.3 VOLT CMOS SyncBiFIFO-TM
• Manufacturer: IDT [Integrated Device Technology]

NOTE:
1. t
A0-A35
B0-B35
IDT72V3682/72V3692/72V36102 3.3V CMOS SyncBiFIFO
16,384 x 36 x 2, 32,768 x 36 x 2 and 65,536 x 36 x 2
CLKA edge is less than t
W/RA
CLKA
SKEW1
W/RB
CLKB
MBB
CSB
CSA
MBA
ENB
ENA
EFA
FFB
is the minimum time between a rising CLKB edge and a rising CLKA edge for EFA to transition HIGH in the next CLKA cycle. If the time between the rising CLKB edge and rising
LOW
HIGH
FIFO2 Empty
LOW
LOW
LOW
LOW
SKEW1
t
ENS2
t
ENS2
t
Figure 11. EFA Flag Timing and First Data Read when FIFO2 is Empty (IDT Standard Mode)
DS
, then the transition of EFA HIGH may occur one CLKA cycle later than shown.
W1
t
SKEW1
t
t
t
ENH
ENH
DH
(1)
t
CLKH
1
t
CLK
t
CLKL
TM
20
t
POR
2
t
t
CLKH
ENS2
t
CLK
t
CLKL
t
POR
t
t
A
ENH
COMMERCIAL TEMPERATURE RANGE
W1
4679 drw 14