lc72134m Sanyo Semiconductor Corporation, lc72134m Datasheet - Page 20

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lc72134m

Manufacturer Part Number
lc72134m
Description
Dual Pll Frequency Synthesizer For Fm Tuner Systems
Manufacturer
Sanyo Semiconductor Corporation
Datasheet
IF Counter Operation
Applications must first, before starting an IF count operation reset the IF counter by setting CTE in the serial data to 0.
The IF counter operation is started setting CTE in the serial data from 0 to 1. Although the serial data is determined by dropping the CE pin from high to low,
the IF signal input to the IFIN pin must be provided within the wait time from the point CE goes low. Next, the readout of the IF counter after measurement is
complete must be performed while CTE is still 1, since the counter will be reset if CTE is set to 0.
Note: If IF counting is used, applications must determine whether or not the IF IC SD (station detect) signal is present in the microcontroller software, and
Unlocked State Detection Timing
• Unlocked state detection timing
Unlocked state detection is performed during the reference frequency (fref) period (interval). This means that a period
at least as long as the period of the reference frequency is required to recognize the locked/unlocked state. However,
applications must wait at least twice the period of the reference frequency immediately after changing the divisor (N)
(which is applied to the frequency) before checking the locked/unlocked state.
For example, if fref is 1 kHz (a period of 1 ms) applications must wait at least 2 ms after the divisor N is changed
before performing a locked/unlocked check.
perform the IF count only if that signal is asserted. This is because auto-search techniques that only use IF counting are subject to incorrect stopping at
points where there is no station due to IF buffer leakage.
Figure 1 Unlocked State Detection Timing
LC72134M
No. 5814-20/27

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