ISL28210 INTERSIL [Intersil Corporation], ISL28210 Datasheet - Page 16
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ISL28210
Manufacturer Part Number
ISL28210
Description
Precision Low Noise JFET Operational Amplifiers
Manufacturer
INTERSIL [Intersil Corporation]
Datasheet
1.ISL28210.pdf
(25 pages)
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FIGURE 43. UNITY-GAIN THD+N vs OUTPUT VOLTAGE
Power Dissipation
It is possible to exceed the +150°C maximum junction
temperatures under certain load and power supply
conditions. It is therefore important to calculate the
maximum junction temperature (T
applications to determine if power supply voltages, load
conditions, or package type need to be modified to
remain in the safe operating area. These parameters are
related using Equation 1:
where:
• P
• PD
where:
• T
• θ
• PD
• V
• I
• V
• R
T
PD
JMAX
dissipation of each amplifier in the package (PD
Equation 2:
amplifier
application
0.0001
qMAX
MAX
0.001
JA
DMAXTOTAL
MAX
S
OUTMAX
L
0.01
0.1
MAX
MAX
= Load resistance
= Total supply voltage
= Thermal resistance of the package
1
=
0
=
= Maximum ambient temperature
= Maximum quiescent supply current of 1
V
T
R
A
for each amplifier can be calculated using
= Maximum power dissipation of 1 amplifier
V
S
V
MAX
L
S
= ±5V
= Maximum output voltage swing of the
= 600Ω
= 1
1
vs TEMPERATURE AT V
LOAD
×
I
+
is the sum of the maximum power
qMAX
θ
2
JA
xPD
+
(
3
V
MAXTOTAL
S
- V
16
4
OUTMAX
V
P-P
+25°C
5
(V)
+85°C
+125°C
JMAX
)
6
S
×
= ±5V FOR 600Ω
V
--------------------------- -
) for all
OUTMAX
7
R
-40
L
ISL28110, ISL28210
°C
8
0°C
9
(EQ. 1)
(EQ. 2)
MAX
10
)
ISL28110 and ISL28210 SPICE Model
Figure 44 shows the SPICE model schematic and
Figure 45 shows the net list for the SPICE model. The
model is a simplified version of the actual device and
simulates important AC and DC parameters. AC
parameters incorporated into the model are: 1/f and
flatband noise voltage, Slew Rate, CMRR, Gain and
Phase. The DC parameters are I
and output voltage swing. The model uses typical
parameters given in the “Electrical Specifications” Table
beginning on page 4. The AVOL is adjusted for 125dB
with the dominant pole at 7Hz. The CMRR is set 120dB,
f = 280kHz. The input stage models the actual device to
present an accurate AC representation. The model is
configured for ambient temperature of +25°C.
Figures 46 through 59 show the characterization vs
simulation results for the Noise Voltage, Closed Loop
Gain vs Frequency, Small Signal 0.1V Step, Large Signal
5V Step Response, Open Loop Gain Phase, CMRR and
Output Voltage Swing for ±5V and ±15V supplies.
LICENSE STATEMENT
The information in this SPICE model is protected under
the United States copyright laws. Intersil Corporation
hereby grants users of this macro-model hereto referred
to as “Licensee”, a nonexclusive, nontransferable licence
to use this model as long as the Licensee abides by the
terms of this agreement. Before using this macro-model,
the Licensee should read this license. If the Licensee
does not accept these terms, permission to use the
model is not granted.
The Licensee may not sell, loan, rent, or license the
macro-model, in whole, in part, or in modified form, to
anyone outside the Licensee’s company. The Licensee
may modify the macro-model to suit his/her specific
applications, and the Licensee may make copies of this
macro-model for use within their company only.
This macro-model is provided “AS IS, WHERE IS, AND
WITH NO WARRANTY OF ANY KIND EITHER EXPRESSED
OR IMPLIED, INCLUDING BUY NOT LIMITED TO ANY
IMPLIED WARRANTIES OF MERCHANTABILITY AND
FITNESS FOR A PARTICULAR PURPOSE.”
In no event will Intersil be liable for special, collateral,
incidental, or consequential damages in connection with
or arising out of the use of this macro-model. Intersil
reserves the right to make changes to the product and
the macro-model without prior notice.
OS
, total supply current
December 8, 2010
FN6639.1