cxd1196ar Sony Electronics, cxd1196ar Datasheet - Page 14

• Manufacturer Part Number: cxd1196ar
• Description: Cd-rom Decoder
• Manufacturer: Sony Electronics

Description of Functions
1. Description of Pins
1.1 CD player interface
1.2 Buffer memory interface
1.3 CPU interface
The CXD1196AR can be directly connected to digital signal processing LSIs for CD of Sony and other
company. The digital signal processing LSI for CD is referred to as a DSP for CD.
(1) DATA (DATA : Input)
(2) BCLK (Bit Clock : Input)
(3) LRCK (LR Clock : Input)
(4) C2PO (C2 Pointer : Input)
(5) EMP (Emphasis : Input)
The CXD1196AR can be connected to a standard SRAM up to 32 Kbytes (256 Kbits).
(1) XMWR (BUFFER MEMORY WRITE : OUT)
(2) XMOE (BUFFER MEMORY OUTPUT ENABLE : OUT)
(3) MA0-14 (BUFFER MEMORY ADDRESS : OUT)
(4) MDB0-7 (BUFFER MEMORY DATA BUS : BUS)
(1) XWR (CPU WRITE : Input)
(2) XRD (CPU READ : Input)
(3) D0-7 (CPU DATA BUS : Input and output)
(4) A0 (CPU ADDRESS : Input)
(5) INT (CPU INTERRUPT : Output)
(6) INTP (INTERRUPT POLARITY : Input)
(7) XCS (CHIP SELECT : Input)
Serial data stream from a CIRC LSI
Bit clock signal for strobing DATA signal
LR clock signal indicating Lch and Rch of DATA signal
C2 pointer signal indicating that DATA input contains an error
Emphasis indicating that the data from the DSP is emphasized. (positive logic signal)
Data write signal to buffer memory (strobe negative logic output)
Data read signal to buffer memory (strobe negative logic output)
Address signals to buffer memory
Buffer memory data bus signal pulled up by a typical 25 k resistor
In an ADPCM decode playback drive, make sure that the CXD1196AR is connected to a 256 Kbit (8
32 K
Strobe signal for writing to register in chip (negative logic input)
Strobe for reading out status of register chip (negative logic input signal)
8-bit data bus
CPU address signal for selecting internal register of the CXD1196AR
Interrupt request output signal for CPU. The polarity of this signal can be controlled by the INTP pin.
This pin controls the polarity of the INT pin. In the IC, it is pulled up by a typical 50 k register.
When INTP= ‘H’ or open, the INT pin goes low active.
When INTP= ‘L’ , the INT pin goes high active.
Chip select signal for CPU to select the CXD1196AR (negative logic input)
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, 32 Kbyte) SRAM
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CXD1196AR
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