em78p510nso32j/s ELAN Microelectronics Corp, em78p510nso32j/s Datasheet - Page 89

• Manufacturer Part Number: em78p510nso32j/s
• Description: 8-bit Microprocessor With Otp Rom
• Manufacturer: ELAN Microelectronics Corp

Product Specification (V1.1) 01.25.2008
(This specification is subject to change without further notice)
6.13.1 Timer Mode
In Timer mode, counting down is performed using the internal clock. The down-counter
value auto reloads from T1PD. When the contents of the down-counter underflow, an
interrupt is generated and the counter is cleared. Counting down resumes after the
counter is cleared.
6.13.2 T1OUT Mode
In Timer 1 underflow Output mode, counting down is performed using the internal clock
with prescale or External clock through T1CLK Pin or Sub Frequency with prescale.
The counter value is loaded from T1PD, when the counter underflows. The F/F output
is toggled and the counter is auto-reloaded from T1PD, each time an overflow is found.
The F/F output is inverted and output to /T1OUT pin. This mode can generate 50%
duty pulse output. The program can initialize the F/F and it is initialized to “0” during a
reset. A T1OUT interrupt is generated each time the /T1OUT output is toggled.
6.13.3 Capture Mode
In Capture mode, the pulse width, period and duty of the T1CAP input pin are
measured in this mode, which can be used in decoding the remote control signal. The
counter is free running by the internal clock. On the rising (falling) edge of T1CAP pin
input, the contents of the counter is loaded into T1PD, then the counter is cleared and
interrupt is generated. On the falling (rising) edge of T1CAP pin input, the contents of
the counter are loaded into T1TD. The counter is still counting, on the next rising edge
of the T1CAP pin input, the contents of the counter are loaded into T1PD, counter is
cleared and interrupt is generated again. If an overflow occurs before the edge is
detected, the 00H is loaded into T1PD and an underflow interrupt is generated. During
interrupt processing, it can be determined whether or not there is an overflow by
checking whether the T1PD value is 00H. After an interrupt (capture to T1PD or
overflow detection) is generated, capture and underflow detection are halted until
T1PD is read out.
Figure 6-27 T1OUT Mode Timing Chart
8-Bit Microprocessor with OTP ROM
EM78P510N
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