em78p257 ELAN Microelectronics Corp, em78p257 Datasheet - Page 17
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em78p257
Manufacturer Part Number
em78p257
Description
8-bit Microcontroller
Manufacturer
ELAN Microelectronics Corp
Datasheet
1.EM78P257.pdf
(91 pages)
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This specification is subject to change without prior notice.
13. RE (Mouse Control Register)
14. RF (Interrupt Status Register)
15. R10 ~ R3F
• Bit 0(PWM) Pulse Width Modulation. When PWM = 1 and LGP = 0, the LSB Counter and MSB
• Bit 7 (MOUSEN) Mouse application Enable bit.
• Bit 6~Bit 0 Not used.
• Bit 7 (CMP4IF) Status changed interrupt flag. Set as change occurred in the output of Comparator
• Bit 6 (CMP3IF) Status changed interrupt flag. Set as change occurred in the output of Comparator
• Bit 5 (CMP2IF) Status changed interrupt flag. Set as change occurred in the output of Comparator
• Bit 4 (CMP1IF) Status changed interrupt flag. Set as change occurred in the output of Comparator
• Bit 3 Unemployed, read as ‘0’;
• Bit 2 (EXIF) External interrupt flag. Set by on /INT pin, and reset by software.
• Bit 1 (ICIF) Port 5 input status changed interrupt flag. Set when Port 5 input changes, and reset by
• Bit 0 (TCIF) TCC overflowing interrupt flag. Set when TCC overflows, and reset by software.
• RF can be cleared by instruction but cannot be set.
• IOCF0 is the relative interrupt mask register.
• All of these are the 8-bit general purpose registers.
1: Enable MOUSEN. TCCA, TCCBL and TCCC work as up/down counters. The other pin
assignment refers to IOC80 and IOC90.
Counter are disabled, a continuous pulse train is generated, and the output signal is actually a PWM
waveform format of PWM.
CO4, and reset by software.
CO3, and reset by software.
CO2, and reset by software.
CO1, and reset by software.
software.
0: Disable MOUSEN. TCCA, TCCB and TCCC are increment counters.
“1” means interrupt request, and “0” means no interrupt occurs.
MOUSEN
CMP4IF
7
7
CMP3IF
6
6
-
CMP2IF
5
5
-
CMP1IF
4
4
-
17
3
3
-
-
EXIF
2
2
-
ICIF
EM78P257
1
1
-
07.27.2004 (V1.4)
OTP ROM
TCIF
0
0
-
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