m66009fp Mitsumi Electronics, Corp., m66009fp Datasheet - Page 3

• Manufacturer Part Number: m66009fp
• Description: 8-bit I/o Expander With 5-bit Address
• Manufacturer: Mitsumi Electronics, Corp.

DATA SENDING/RECEIVING PROTOCOL AND OPERA-
TION PROCEDURE
The timing at which microcomputer communicates with
M66009 is as shown in the diagram below. When microcom-
puter accesses to M66009, it declares the start of access by
lowering pin EN status from “H” to “L”. It then sends data to
pins CLK and DI at the timing shown below. The access stops
as pin EN status rises from “L” to “H”. Given below is more de-
tailed explanation of data sending/receiving procedure:
(1) At EN fall edge, 8-bit parallel data that arrives at input/out-
(2) At CLK rise edge, data at pin DI is taken into serial input
(3) When 5-bit address is taken in, it is compared to address
(4) When command bits C2, C1 and C0 are all “1”, operation
put pins D0 thru D7 is loaded into shift register for serial
output.
shift register, and internal clock counter starts counting up.
set by pins A0 thru A4. If they are the same, acknowledge
bit “0” is output to pin DO synchronously with CLK 8T fall
edge.
(When the addresses are not the same, pin DO output
status stays at the “H” level.)
proceeds to (5) and (6) described below.
If any of these command bits are not “1” while the ad-
dresses are the same, pin DO output is fixed to “H” syn-
chronously with CLK 9T rise, and operation is halted until
EN rises. When EN rises, clock counter is reset, and
M66009 becomes ready to accept a next access.
EN
CLK
DI
DO
1T
A4
2T
A3
Address bits
A2
A1
A0
Data Communication protocol
6T
Command bits(
"1"
C2
7T
C1
"1"
ACK0
8T
C0
"1"
9T
)
DO
DI
7
7
DO
(5) When the addresses are the same and the command bits
(6) When EN rises: Output pin DO status is fixed to “H”, and
(Note) If the clock counter output is not 10 H when EN rises,
DI
6
are all “1”, serial output operation starts. Eight-bit data
latched at step (1) as described above is output in series,
starting from the bit at pin D7, through pin DO synchro-
nously with the fall edges of CLK 9T thru 16T. No opera-
tion is performed for CLK inputs after 16T, except the
count up of CLK.
only when clock counter has counted 16 CLK rise edges
(counter output =10H), the lower 8 bits of the 16-bit serial
data is sent to output latch synchronously with the EN rise
edge. The latched data is inverted in logic, and output to
pins D0 thru D7 in parallel. Clock counter is then reset,
completing one sequence.
6
DO
DI
data is not sent to output latch. Output pin DO is fixed
to “H”, clock counter is reset, and M66009 becomes
ready to accept a next access.
5
5
DO
DI
Data bits
4
8-BIT I/O EXPANDER WITH 5-BIT ADDRESS
4
(
DO
DI
3
) Command bits (C2, C1, C0) = (1, 1, 1)
3
DO
DI
2
2
15T 16T
MITSUBISHI DIGITAL ASSP
DO
DI
1
1
DI
DO
0
0
M66009FP
3