cxd2589q Sony Electronics, cxd2589q Datasheet - Page 12

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cxd2589q

Manufacturer Part Number
cxd2589q
Description
Cd Digital Signal Processor
Manufacturer
Sony Electronics
Datasheet

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Description of Functions
1. CPU Interface and Commands
• CPU Interface
• Information on each address and the data is provided in Table 1-1.
• The internal registers are initialized by a reset when XRST is low; the initialization data is shown in Table 1-2.
Note) When XLAT is low, SQCK must be set high.
This interface uses DATA, CLOK and XLAT to set the modes.
The interface timing chart is shown below.
Registers 4 to E
CLOK
DATA
XLAT
750ns or more
D1
Data
– 12 –
D2
D3
D0
D1
Address
D2
D3
Valid
300ns max
750ns or more
CXD2589Q

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