cxa3250an Sony Electronics, cxa3250an Datasheet - Page 24

• Manufacturer Part Number: cxa3250an
• Description: All Band Tv Tuner Ic With On-chip Pll
• Manufacturer: Sony Electronics

Reference Divider Frequency Division Ratio Table
X : Don’t care
27-bit data format
ENABLE
4-3) 27-bit data transfer
CLOCK
M0 to
S0 to
CD
OS
CP
BS1 to BS4 : band switch control (output PNP transistor ON when “1”)
R0, R1
DATA
Invalid data
R1
X
The 3-wire bus also automatically supports the 27-bit format in which various control data are
transferred in addition to the band and frequency data.
Data is loaded at the rising edge of the clock signal while the enable signal is high, and is latched at the
falling edge of the enable signal.
The clocks during the enable period are counted, and 27 bits of data as counted from the rising edge of
the enable signal are loaded as valid data.
0
1
BS4 BS3 BS2 BS1
: main divider frequency division ratio setting
: swallow counter frequency division ratio setting
: charge pump OFF (when “1”)
: varicap output OFF (when “1”)
: charge pump current switching (200 µA when “1”, 50 µA when “0”)
: Reference divider frequency division ratio setting.
Band switch data
1
R0
1
1
0
Time
4
M9
5
Reference divider
M8
Frequency data
128
64
80
S3
S2
—24—
S1
S0
19
20
X
CP
Test data
CD
X
R1
R0
27
X
Invalid data
CXA3250AN
Latch