ST72324 STMICROELECTRONICS [STMicroelectronics], ST72324 Datasheet - Page 140

• Manufacturer Part Number: ST72324
• Description: 5V RANGE 8-BIT MCU WITH 8 TO 32K FLASH, 10-BIT ADC, 4 TIMERS, SPI, SCI INTERFACE
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

ST72324
12.12 COMMUNICATION INTERFACE CHARACTERISTICS
12.12.1 SPI - Serial Peripheral Interface
Subject to general operating conditions for V
design simulation and/or characterisation results, not tested in production.
When no communication is on-going the data output line of the SPI (MOSI in master mode, MISO in slave
mode) has its alternate function capability released. In this case, the pin status depends on the I/O port
configuration. Refer to I/O port characteristics for more details on the input/output alternate function char-
acteristics (SS, SCK, MOSI, MISO).
Figure 80. SPI Slave Timing Diagram with CPHA=0
Notes:
1. Measurement points are done at CMOS levels: 0.3xV
140/163
1
Symbol
1/t
t
t
w(SCKH)
w(SCKL)
t
t
t
t
t
t
t
t
dis(SO)
t
t
t
t
r(SCK)
su(SS)
f(SCK)
t
su(MI)
t
v(MO)
h(MO)
f
su(SI)
a(SO)
v(SO)
h(SO)
MISO
MOSI
h(SS)
h(MI)
c(SCK)
h(SI)
SCK
SS
CPHA=0
CPOL=0
CPHA=0
CPOL=1
OUTPUT
INPUT
INPUT
SPI clock frequency
SPI clock rise and fall time
SS setup time
SS hold time
SCK high and low time
Data input setup time
Data input hold time
Data output access time
Data output disable time
Data output valid time
Data output hold time
Data output valid time
Data output hold time
see note 2
t
a(SO)
t
su(SS)
t
su(SI)
Parameter
t
t
MSB IN
w(SCKH)
w(SCKL)
MSB OUT
t
t
h(SI)
c(SCK)
DD
t
v(SO)
, f
DD
CPU
Master
Slave
Slave
Slave
Master
Slave
Master
Slave
Master
Slave
Slave
Slave
Slave (after enable edge)
Master (before capture edge)
BIT6 OUT
and 0.7xV
, and T
1)
Conditions
A
DD
unless otherwise specified. Data based on
BIT1 IN
.
t
f
f
h(SO)
CPU
CPU
=8MHz
=8MHz
t
t
r(SCK)
f(SCK)
f
CPU
LSB IN
0.0625
see I/O port pin description
0.25
0.25
Min
120
120
100
100
100
100
100
90
LSB OUT
0
0
0
/128
t
h(SS)
f
f
CPU
CPU
Max
120
240
90
2
4
/4
/2
t
dis(SO)
Unit
t
MHz
CPU
ns
note 2
see