ml6694 Microsemi Corporation, ml6694 Datasheet

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ml6694

Manufacturer Part Number
ml6694
Description
100base-tx Physical Layer With 5-bit Interface
Manufacturer
Microsemi Corporation
Datasheet

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GENERAL DESCRIPTION
The ML6694 is a high-speed physical layer transceiver
that provides a 5-bit (or symbol) interface to unshielded
twisted pair cable media. The ML6694 is well suited for
repeater applications using repeater controllers with the
5-bit interface. The ML6694 may also be used in FDDI-
over-copper applications.
The ML6694 integrates 125MHz clock recovery/
generation, receive adaptive equalization, baseline
wander correction and MLT-3/10BASE-T transmitter.
BLOCK DIAGRAM
44
16
11
13
15
2
3
4
5
6
8
9
TSM4
TSM3
TSM2
TSM1
TSM0
TXC
RXC
RSM4
RSM3
RSM2
RSM1
RSM0
100BASE-TX Physical Layer with 5-Bit Interface
DESERIALIZER
SERIALIZER
(PLCC Pin Configuration)
NRZI TO NRZ DECODER
CLOCK SYTHESIZER
CLOCK AND DATA
CONTROL LOGIC
NRZI TO MLT-3
NRZ TO NRZI
25
RECOVERY
ENCODER
AND
42
FEATURES
* Some Packages Are End Of Life As Of August 1, 2000
7
5-bit (or symbol) parallel interface
Compliant to IEEE 802.3u 100BASE-TX standard
Compliant to ANSI X3T12 TP-PMD (FDDI) standard
Single-jack 10BASE-T/100BASE-TX solution when used
with external 10Mbps PHY
125MHz receive clock recovery/generation
Baseline wander correction
Adaptive equalization and MLT-3 encoding/decoding
Supports full-duplex operation
TWISTED PAIR DRIVER
100BASE-TX/10BASE-T
BLW CORRECTION
MLT-3 DECODER
LOOPBACK MUX
EQUALIZER
41
40
ML6694*
TPOUTN
TPOUTP
CMREF
RGMSET
SDO
TPINN
TPINP
RTSET
May 1997
38
37
39
34
33
31
30
24
1

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ml6694 Summary of contents

Page 1

... GENERAL DESCRIPTION The ML6694 is a high-speed physical layer transceiver that provides a 5-bit (or symbol) interface to unshielded twisted pair cable media. The ML6694 is well suited for repeater applications using repeater controllers with the 5-bit interface. The ML6694 may also be used in FDDI- over-copper applications. ...

Page 2

... DGND3 2 ML6694 44-Pin PLCC (Q44 ML6694 44-Pin TQFP (H44-10 CMREF ...

Page 3

... Transmit data TTL inputs. TSM<4:0> inputs accept TX data symbols. Data appearing at TSM<4:0> are clocked into the ML6694 on the rising edge of TXC. Device power down input. A low signal powers down all ciruits of the ML6694, and dissipates less than 20mA. Receive data TTL outputs. RSM<4:0> outputs may be sampled synchronously with RXC’ ...

Page 4

... ML6694 PIN DESCRIPTION (Continued) PIN NAME 39 (33) CMREF 40,41 (34,35) 10BTTXINN/P 10BASE-T transmit waveform inputs. The ML6694 presents a linear copy of the input LPBK 42 (36) 43 (37) AVCC1 44 (38) TXC 4 DESCRIPTION Receiver common-mode reference output. This pin provides a common-mode bias point for the twisted-pair media line receiver. A typical value for CMREF is (VCC– ...

Page 5

... Receive transformer insertion loss ........................ <–0.5dB CONDITIONS I = –400 100 0. 2. 4mA –4mA OH 100 Termination across TPINP/N RGMSET = 9.53k RTSET = 2.49k Note 200 200 ML6694 MIN TYP MAX UNITS 0.8 V 2.0 V –200 A 100 A 0 – 1. –3.0 3.0 V 10.0k +10 A 130 A 500 A ...

Page 6

... ML6694 DC ELECTRICAL CHARACTERISTICS SYMBOL PARAMETER Transmitter (Continued) X TPOUTP/N Differential Output ERR Current Error X TPOUTP/N 100BASE-X Output CMP100 Current Compliance Error V TPOUTP/N 10BASE-T Output OCM10 Voltage Compliance Range V 10BTTXNN/P Input ICM10 Common-Mode Voltage Range Power Supply Current I Supply Current 100BASE-TX CC100 Operation, Transmitting ...

Page 7

... First bit of /J/ at MDI to first rising edge of RXC after the last part of the /J/ appears at RSM <4:0>. TPOUTP TPOUTN (Continued) CONDITIONS 25MHz frequency 1.25V/RTSET 2:1 200 R LP 200 R LS 49.9 Figure 1. Test Circuit ML6694 MIN TYP MAX –100 +100 ...

Page 8

... ML6694 t TPWH TXC TSM<4:0> RXC RSM<4:0> TPWL t TPS Figure TPWH TPWL RPCF t t RCS RCM Figure 3. t TPH t RPCR ...

Page 9

... The inductors L1 and L2 are for the purpose of improving return loss. Capacitor C7 is recommended. It decouples some noise at the inputs of the ML6694 and improves the Bit Error Rate (BER) performance of the board recommended having a 0.1 F capacitor on every V CC C3, 4, 9-12 ...

Page 10

... TPOUTN R9 32 AGND3 31 RTSET 30 RGMSET AVCC FB1, FB2 L1, L2 Figure 2. ML6694 Typical Applications Circuit AVCC FB1 + C10 C6 C4 C11 C12 FB2 1:1 C7 R16 R15 L1 2:1 AVCC R18 L2 R19 U5 R21 R22 R20 C2 10pF Cap Board Layer Cap (2kV rated) ...

Page 11

... SEATING PLANE Package: H44-10 44-Pin ( 1mm) TQFP 34 0.394 BSC 0.472 BSC (10.00 BSC) (12.00 BSC) 23 0.012 - 0.018 0.048 MAX (0.29 - 0.45) (1.20 MAX) 0.037 - 0.041 (0.95 - 1.05) ML6694 0.042 - 0.056 (1.07 - 1.42) 0.025 - 0.045 (0.63 - 1.14) (RADIUS) 0.500 BSC 0.590 - 0.630 (12.70 BSC) (14.99 - 16.00) 0.100 - 0.112 (2.54 - 2.84) 0º - 8º 0.003 - 0.008 (0.09 - 0.20) 0.018 - 0.030 (0 ...

Page 12

... ML6694 ORDERING INFORMATION PART NUMBER ML6694CQ ML6694CH © Micro Linear 1997 is a registered trademark of Micro Linear Corporation Micro Linear Products described in this document may be covered by one or more of the following patents, U.S.: 4,897,611; 4,964,026; 5,027,116; 5,281,862; 5,283,483; 5,418,502; 5,508,570; 5,510,727; 5,523,940; 5,546,017; 5,559,470; 5,565,761; 5,592,128; 5,594,376; Japan: 2598946; 2619299. Other patents are pending. ...

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