ml6694 Microsemi Corporation, ml6694 Datasheet - Page 3

• Manufacturer Part Number: ml6694
• Description: 100base-tx Physical Layer With 5-bit Interface
• Manufacturer: Microsemi Corporation

PIN DESCRIPTION
1
2-6
7
8,9,
11,13, 5, 7, 9)
15
10
12
14
16
17
18
19
20
21
22
23
24
25
28
30
31
32
33,34 (27,28)
35
36
37,38 (31, 32)
PIN
(39)
(40-44)
(1)
(2, 3,
(4)
(6)
(8)
(10)
(11)
(12)
(13)
(14)
(15)
(16)
(17)
(18)
(19)
(22)
(24)
(25)
(26)
(29)
(30)
NAME
AGND1
TSM<4:0>
PWRDN
RSM<4:0>
DGND1
DVCC1
DGND2
RXC
DGND3
DVCC2
DGND4A
DGND4B
DGND4C
DVCC5
DGND5
SD0
SEL10/100
AVCC3
RGMSET
RTSET
AGND3
TPOUTN/P
AGND2
AVCC2
TPINN/P
(Pin numbers for TQFP package in parentheses)
DESCRIPTION
Transmit data TTL inputs. TSM<4:0> inputs accept TX data symbols. Data
appearing at TSM<4:0> are clocked into the ML6694 on the rising edge of TXC.
Device power down input. A low signal powers down all ciruits of the ML6694, and
dissipates less than 20mA.
Receive data TTL outputs. RSM<4:0> outputs may be sampled synchronously with
RXC’s rising edge.
Digital +5V power supply.
Recovered receive symbol clock TTL output. This 25MHz clock is phase-aligned
with the internal 125MHz bit clock recovered from the signal received at TPINP/N
when data is present. Receive data at RSM<4:0> change on the falling edges and
should be sampled on the rising edges of this clock. RXC is phase aligned to TXC
when 100BASE-TX signal is not present at TPINP/N
Digital ground.
Digital ground.
Digital ground.
Digital ground.
Digital ground.
Signal detect TTL output. A high output level indicates 100BASE-TX activity at
TPINP/N with an amplitude exceeding the preset threshold. The signal detect
function is active only in 100Mbps mode, that is when the pin SEL10/100 is low.
Speed select TTL input. Driving this pin high disables 100BASE-TX transmit and
receive functions, and enables the 10BASE-T transmit path from 10BTTXINP/N to
TPOUTP/N. A low signal on SEL10/100 disables the 10BTTXINP/N inputs and enables
100BASE-TX operation.
Analog positive power supply.
Equalizer bias resistor input. An external 9.53k , 1% resistor connected between
RGMSET and AGND3 sets internal time constants controlling the receive equalizer
transfer function.
between RTSET and AGND3 sets a precision constant bias current for the twisted
pair transmit level.
Transmit twisted pair outputs. This differential current output pair drives MLT-3
waveforms into the network coupling transformer in 100BASE-TX mode, and
10BASE-T or FLP waveforms in 10BASE-T mode.
Analog +5V power supply.
Receive twisted pair inputs. This differential input pair receives 100BASE-TX signals
from the network.
Analog ground.
Digital ground.
Digital ground.
Digital +5V power supply.
Digital +5V power supply.
Transmit level bias resistor input. An external 2.49k , 1% resistor connected
Analog ground.
Analog ground.
ML6694
3