ST72F321 STMICROELECTRONICS [STMicroelectronics], ST72F321 Datasheet - Page 27

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ST72F321

Manufacturer Part Number
ST72F321
Description
64/44-PIN 8-BIT MCU WITH 32 TO 60K FLASH/ROM, ADC, FIVE TIMERS, SPI, SCI, I2C INTERFACE
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet

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6.4 SYSTEM INTEGRITY MANAGEMENT (SI)
The System Integrity Management block contains
the Low Voltage Detector (LVD), and Auxiliary
Voltage Detector (AVD) functions and Clock Secu-
rity System (CSS). It is managed by the SICSR
register.
6.4.1 Low Voltage Detector (LVD)
The Low Voltage Detector function (LVD) gener-
ates a static reset when the V
below a V
secures the power-up as well as the power-down
keeping the ST7 in reset.
The V
than the V
to avoid a parasitic reset when the MCU starts run-
ning and sinks current on the supply (hysteresis).
The LVD Reset circuitry generates a reset when
V
The LVD function is illustrated in
The voltage threshold can be configured by option
byte to be low, medium or high.
Provided the minimum V
the oscillator frequency) is above V
can only be in two modes:
Figure 15. Low Voltage Detector vs Reset
DD
– V
– V
RESET
is below:
IT-
IT+
IT-
V
V
reference value for a voltage drop is lower
when V
when V
IT+
IT-
IT+
IT-
reference value for power-on in order
reference value. This means that it
V
DD
DD
DD
is falling
is rising
DD
value (guaranteed for
DD
Figure
supply voltage is
IT-
, the MCU
15.
In these conditions, secure operation is always en-
sured for the application without the need for ex-
ternal reset hardware.
During a Low Voltage Detector Reset, the RESET
pin is held low, thus permitting the MCU to reset
other devices.
Notes:
The LVD allows the device to be used without any
external RESET circuitry.
If the medium or low thresholds are selected, the
detection may occur outside the specified operat-
ing voltage range. Below 3.8V, device operation is
not guaranteed.
The LVD is an optional function which can be se-
lected by option byte.
It is recommended to make sure that the V
ply voltage rises monotonously when the device is
exiting from Reset, to ensure the application func-
tions properly.
V
– under full software control
– in static safe reset
hys
ST72321
DD
27/189
sup-

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