SC28L92A1BS NXP [NXP Semiconductors], SC28L92A1BS Datasheet - Page 60
SC28L92A1BS
Manufacturer Part Number
SC28L92A1BS
Description
3.3 V/5.0 V Dual Universal Asynchronous Receiver/Transmitter (DUART)
Manufacturer
NXP [NXP Semiconductors]
Datasheet
1.SC28L92A1BS.pdf
(73 pages)
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SC28L92_7
Product data sheet
Fig 14. Interrupt cycle timing (68xxx mode)
Fig 15. Port timing
a. Input pins.
b. Output pins.
D0 to D7
DACKN LOW requires two rising edges of X1 clock after CEN is LOW.
X1/CLK
DACKN
INTRN
IACKN
OP0 to OP6
IP0 to IP6
WRN
RDN
Rev. 07 — 19 December 2007
3.3 V/5.0 V Dual Universal Asynchronous Receiver/Transmitter
t
CSC
t
PS
t
DD
old data
t
DAL
t
DCR
t
CSD
t
PD
t
PH
t
DAT
t
DF
new data
t
DAH
SC28L92
© NXP B.V. 2007. All rights reserved.
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