k6x1008c2d Samsung Semiconductor, Inc., k6x1008c2d Datasheet - Page 6

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k6x1008c2d

Manufacturer Part Number
k6x1008c2d
Description
128kx8 Bit Low Power Cmos Static Ram
Manufacturer
Samsung Semiconductor, Inc.
Datasheet

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K6X1008C2D Family
TIMING DIAGRAMS
TIMING WAVEFORM OF READ CYCLE(1)
TIMING WAVEFORM OF READ CYCLE(2)
Address
Data Out
NOTES (READ CYCLE)
1.
2. At any given temperature and voltage condition,
Address
CS
CS
OE
Data out
t
HZ
levels.
interconnection.
1
2
and
t
OHZ
are defined as the time at which the outputs achieve the open circuit conditions and are not referenced to output voltage
Previous Data Valid
High-Z
t
LZ
t
t
OLZ
t
HZ
(Address Controlled
OH
(WE=V
(Max.) is less than
t
AA
t
t
CO2
CO1
IH
t
)
OE
t
AA
6
,
t
RC
CS1=OE=V
t
t
RC
LZ
(Min.) both for a given device and from device to device
IL
Data Valid
, CS2=WE=V
IH
)
Data Valid
t
t
OHZ
OH
t
HZ(1,2)
CMOS SRAM
September 2003
Revision 1.0

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