act7000asc Aeroflex Circuit Technology, act7000asc Datasheet - Page 21

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act7000asc

Manufacturer Part Number
act7000asc
Description
Standard Products Act7000asc 64-bit Superscaler Microprocessor
Manufacturer
Aeroflex Circuit Technology
Datasheet
Mode Data Setup
Mode Data Hold
Notes:
1. Timings are measured from 1.5V of the clock to 1.5V of the signal.
2. Capacitive load for all output timings is 50pF.
3. Data Output timing applies to all signal pins whether tristate I/O or output only.
4. Setup and Hold parameters apply to all signal pins whether tristate I/O or input only.
Data Output
Data Setup
Data Hold
Parameter
SCD7000A Rev B
Parameter
4
4
2,3
1
Clock Timing
System Interface Timing (SysAD, SysCmd, ValidIn*, ValidOut*, etc.)
Sym
t
t
t
DO
DS
DH
mode
mode
t
t
rise
fall
SysClock
SysClock
Data
SysClock
Data
Symbol
t
= see above table
t
DH
= see above table
DS
14...13
14...13
= 10 (fastest)
= 01 (slowest)
Boot-Time Interface Parameters
Test Conditions
System Interface Parameters
t
SCRise
Test Conditions
t
SCFall
SysClock Timing
Output Timing
Input Timing
-
-
21
t
Data
SCP
t
DS
t
MIN
Data
DO
Min
1.0
1.0
2.5
1.0
225MHz
t
DH
t
DO
Min
Max
4
0
4.5
5.5
-
-
±t
Data
Min
JitterIn
1.0
1.0
2.5
1.0
300MHz
Max
-
-
Max
4.5
5.5
-
-
Min
SysClock cycles
1.0
1.0
2.5
1.0
350MHz
Units
Max
4.5
5.5
-
-
Units
ns
ns
ns
ns

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