EL4331C Elantec Semiconductor, Inc. (acquired by Intersil), EL4331C Datasheet - Page 8
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EL4331C
Manufacturer Part Number
EL4331C
Description
Triple 2:1 Mux-amp AV=1
Manufacturer
Elantec Semiconductor, Inc. (acquired by Intersil)
Datasheet
1.EL4331C.pdf
(13 pages)
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EL4331C
Triple 2:1 Mux-Amp AV = 1
Applications Information
Pin Descriptions
Circuit Operation
Each multiplexing amplifier has two input stages. The
multiplexing amplifiers switch from their “A” inputs to
their “B” inputs under control of the common A/B select
pin. The switching has a make before break action. Each
amplifier is internally connected for unity gain, allowing
larger switching matrixes to be built up. Note however,
that each amplifier likes to see a load of 250
load resistances higher than this, can lead to excessive
peaking. Load capacitance should be kept down below
40 pF, and 40 pF requires a load resistance of ð 150 to
keep the output from excessive peaking. Higher capaci-
tive loads can best be driven using a series resistor to
isolate the amplifier from the reactive load.
The ground pins are used as a reference for the logic
controls. Both A/B and PD are referenced to ground.
A1, A2, A3
B1, B2, B3
GND1, GND2,
GND3
OUT1, OUT2,
OUT3
V
V
A/B
PD
CC
EE
“A” inputs to amplifiers 1, 2 and 3 respectively
“B” inputs to amplifiers 1, 2 and 3 respectively
These are the individual ground pins for each channel.
Amplifier outputs. Note there is no short circuit
protection.
Positive power supply. Typically +5V.
Negative power supply, typically -5V.
Common input select pin, a logic high selects the “A”
inputs, logic low selects the “B” inputs. If left to float,
this pin will float high and the “A” channels will be
selected.
A logic low puts the part into its power down mode. Note
that when this pin is at a logic high (+5V), it will sink
typically 1 mA. When pulled low, it will source a few
µA, typically < 25 µA. This pin should not be left
floating.
or less;
8
The supplies do not have to be symmetrical around
ground, but the logic inputs are referred to the ground
pins, and the logic swing must not exceed the +V supply.
Due to the fact that all three channels share common
control pins, the three grounds have to be at the same
potential. One third of the 1 mA that PD will sink (at
5V) will be seen at each ground pin. Also, the individual
grounds are internally connected to their channel com-
pensation capacitor in an effort to keep crosstalk low.
A/B Switching
Referring to the photographs showing the 0V–0V
switching glitches, it will be noted that slower edges on
the A/B control pin result in switching glitches of some-
what less total energy. The switching action is a make-
before-break, so the two inputs essentially get mixed at
the output for a few nanoseconds. Note that the two
inputs are buffered, so there is no component of one
input injected into the other input. The input impedance
does not depend on whether an input has been selected.
Power Down
Referring to the photographs of the power down func-
tion and Figure 4, it will be noted that there is a
considerable glitch in the output as the part powers
down. It will also be noted that the power down time is
considerably longer than power up, 1 µs compared to
150 ns. In power down mode, the whole amplifier, its
reference and bias lines are all powered down. At the
same time, the output stage has been configured so that
the powered down output appears as a high impedance.
This allows circuits such as the multiplexer shown in
application #4 to be realized, although the price is the