74LVC1G86GV,125 NXP Semiconductors, 74LVC1G86GV,125 Datasheet - Page 6

• Manufacturer Part Number: 74LVC1G86GV,125
• Description: IC 2-IN EXCL-OR GATE SC74A-5
• Manufacturer: NXP Semiconductors
• Series: 74LVCr

Specifications of 74LVC1G86GV,125

• Number Of Circuits: 1
• Package / Case: SC-74-5, SOT-753
• Logic Type: XOR (Exclusive OR)
• Number Of Inputs: 2
• Current - Output High, Low: 32mA, 32mA
• Voltage - Supply: 1.65 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Product: OR
• Logic Family: LVC
• High Level Output Current: - 32 mA
• Low Level Output Current: 32 mA
• Propagation Delay Time: 2.4 ns
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 1.65 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 74LVC1G86GV; 74LVC1G86GV; 935272026125

NXP Semiconductors
11. Dynamic characteristics
Table 8.
Voltages are referenced to GND (ground = 0 V); for load circuit see
[1]
[2]
[3]
12. Waveforms
74LVC1G86
Product data sheet
Symbol Parameter
t
C
pd
Fig 7.
PD
All typical values are measured at nominal V
t
C
P
f
f
C
V
N = number of inputs switching;
Σ(C
pd
i
o
D
CC
PD
= input frequency in MHz;
L
= output frequency in MHz;
is the same as t
= output load capacitance in pF;
= C
L
is used to determine the dynamic power dissipation (P
= supply voltage in V;
× V
propagation delay A, B to Y; see
power dissipation
capacitance
Measurement points are given in
V
The input A and B to output Y propagation delay times
PD
OL
Dynamic characteristics
CC
× V
2
and V
× f
CC
o
2
) = sum of the outputs.
OH
× f
PLH
i
are typical output voltage levels that occur with the output.
× N + Σ(C
and t
PHL
Conditions
V
L
I
V
V
V
V
V
V
× V
= GND to V
CC
CC
CC
CC
CC
CC
CC
= 1.65 V to 1.95 V
= 2.3 V to 2.7 V
= 2.7 V
= 3.0 V to 3.6 V
= 4.5 V to 5.5 V
= 3.3 V
A, B input
2
Y output
× f
Table
o
All information provided in this document is subject to legal disclaimers.
) where:
CC
Figure 7
CC
9.
.
Rev. 7 — 14 September 2010
D
V
M
in μW).
V
M
[2]
[3]
t
PHL
Min
1.0
0.5
0.5
0.5
0.5
Figure
-
−40 °C to +85 °C
8.
Typ
3.7
2.5
2.8
2.3
1.9
25
[1]
t
PLH
mna041
Max
9.9
5.5
5.8
5.0
4.0
-
2-input EXCLUSIVE-OR gate
−40 °C to +125 °C Unit
74LVC1G86
Min
1.0
0.5
0.5
0.5
0.5
-
© NXP B.V. 2010. All rights reserved.
Max
13.0
7.0
7.5
6.5
5.5
-
ns
ns
ns
ns
ns
pF
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