ma009a Megawin Technology, ma009a Datasheet - Page 8

• Manufacturer Part Number: ma009a
• Description: 24-bit I/o Extender With Interrupt Function
• Manufacturer: Megawin Technology

Command Definition
The command should be sent from MSB to LSB, and the signal must be stable in clock rising edge.
8
Instruction
C_RES
C_EVTCLR
W_ADDR
Input port P0
W_P0PR
W_P0PSR
W_P0IEN
R_P0
R_P0PR
R_P0PSR
R_P0EVT
I/O port P1
W_P1
W_P1CR
W_P1POR
W_P1PSR
W_P1SCR
W_P1IEN
R_P1
R_P1CR
R_P1POR
R_P1PSR
R_P1SCR
R_P1EVT
Output port P2
W_P2
W_P2OR
W_P2SCR
W_P2PR
R_P2OR
R_P2SCR
R_P2PR
OPCODE
FEFFH
13H
FDH
04H
0AH
10H
3DH
34H
3AH
43H
0EH
02H
05H
0BH
08H
11H
3EH
32H
35H
3BH
38H
44H
0FH
06H
09H
0CH
36H
39H
3CH
Operand1
8-bit data
8-bit data
8-bit data
8-bit data
8-bit data
8-bit data
8-bit data
8-bit data
8-bit data
8-bit data
8-bit data
8-bit data
8-bit data
8-bit data
MA009A Technical Summary
8-bit data (R)
8-bit data (R)
8-bit data (R)
8-bit data (R)
8-bit data (R)
8-bit data (R)
8-bit data (R)
8-bit data (R)
8-bit data (R)
8-bit data (R)
8-bit data (R)
8-bit data (R)
8-bit data (R)
Data
Comments
Software chip reset, all register value will
be reset to 0 (default value).
Clear all event, P0EVT and P1EVT will
be cleared.
Write chip address, must match the pin
status of A2 ~A0 to enable MA009.
Write P0PR (pull high control register)
Write P0PSR (strong pull high selection
register)
Write P0IEN (interrupts enable register)
Read P0
Read P0PR
Read P0PSR
Read P0EVT (interrupts events status
register)
Write P1
Write P1CR (I/O control register)
Write P1POR (pull high/output mode
control register)
Write P1PSR
Write P1SCR (sink control register)
Write P1IEN
Read P1
Read P1CR
Read P1POR
Read P1PSR
Read P1SCR
Read P1EVT
Write P2
Write P2OR (output mode control
register)
Write P2SCR
Write P2PR
Read P2OR
Read P2SCR
Read P2PR
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