74LVC06APW,112 NXP Semiconductors, 74LVC06APW,112 Datasheet - Page 2

IC INVERTER HEX 1INPUT 14TSSOP

74LVC06APW,112

Manufacturer Part Number
74LVC06APW,112
Description
IC INVERTER HEX 1INPUT 14TSSOP
Manufacturer
NXP Semiconductors
Series
74LVCr
Datasheet

Specifications of 74LVC06APW,112

Logic Type
Inverter with Open Drain
Number Of Inputs
1
Number Of Circuits
6
Current - Output High, Low
32mA, 32mA
Voltage - Supply
1.65 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
14-TSSOP
Logic Family
LVC
Number Of Channels Per Chip
6
Polarity
Inverting
Supply Voltage (max)
5.5 V
Supply Voltage (min)
1.65 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Low Level Output Current
32 mA
Minimum Operating Temperature
- 40 C
Number Of Lines (input / Output)
6 / 6
Output Type
Open Drain
Propagation Delay Time
2.3 ns at 3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
74LVC06APW
74LVC06APW
935265480112
Philips Semiconductors
FEATURES
QUICK REFERENCE DATA
GND = 0 V; T
Notes
1. C
2. The condition is V
FUNCTION TABLE
See note 1.
Note
1. H = HIGH voltage level;
2003 Nov 27
t
C
C
PLZ
5 V tolerant inputs and outputs (open drain) for
interfacing with 5 V logic
Wide supply voltage range from 1.65 to 5.5 V
CMOS low power consumption
Direct interface with TTL levels
Inputs accept voltages up to 5 V
Complies with JEDEC standard no. 8-1A
ESD protection:
HBM EIA/JESD22-A114-A exceeds 2000 V
MM EIA/JESD22-A115-A exceeds 200 V.
I
PD
Hex inverter with open-drain outputs
SYMBOL
P
f
f
C
V
N = total load switching outputs;
L = LOW voltage level;
Z = high-impedance OFF-state.
/t
i
o
(C
D
CC
PD
= input frequency in MHz;
L
PZL
= output frequency in MHz;
= output load capacitance in pF;
= C
L
is used to determine the dynamic power dissipation (P
= supply voltage in Volts;
PD
V
CC
amb
2
V
CC
= 25 C; t
propagation delay nA to nY
input capacitance
power dissipation capacitance per gate
f
o
2
) = sum of the outputs.
I
f
= GND to V
i
INPUT
N + (C
r
= t
nA
H
L
f
PARAMETER
2.5 ns.
L
CC
.
V
CC
2
f
o
) where:
2
C
V
DESCRIPTION
The 74LVC06A is a high-performance, low-power,
low-voltage, Si-gate CMOS device, superior to most
advanced CMOS compatible TTL families.
Inputs can be driven from either 3.3 or 5 V devices. This
feature allows the use of these devices as translators in a
mixed 3.3 to 5 V environment.
The 74LVC06A provides six inverting buffers.
The outputs of the 74LVC06A are open drain and can be
connected to other open-drain outputs to implement
active-LOW wired-OR or active-HIGH wired-AND
functions.
CC
L
D
= 50 pF; V
in W).
= 3.3 V; notes 1 and 2
CONDITIONS
CC
= 3.3 V
OUTPUT
nY
Z
L
2.3
5.0
8.0
TYPICAL
Product specification
74LVC06A
ns
pF
pF
UNIT

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