sh6612a SinoWealth Micro-Electronics Corp. Ltd, sh6612a Datasheet
sh6612a
Related parts for sh6612a
sh6612a Summary of contents
Page 1
... External interrupt (falling edge) - Timer0 interrupt - Timer1 interrupt - PortB interrupt (falling edge) General Description SH6612A is a single-chip microcontroller integrated with an SH6610C CPU core, SRAM, timer, alarm generator, LCD driver, I/O port, and program ROM. Pad Configuration SEG16 SEG15 SEG14 ...
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... Bit programmable I/O P Ground pin I Bonding option, internally pull-high O Oscillator output pin, connected to crystal oscillator I Oscillator input pin, connected to crystal or external resistor O Common signal output for LCD display 2/24 SH6612A TEST OSCI OSC OSCO PORTB, PORTC PORTD PORTA.0 (INT) PORTA.1(BD) PORTA.2 (BD) PORTA.3 COMMON ...
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... During an interrupt service or call instruction, the carry flag is pushed into the stack 2. ROM The SH6612A can address 2K × 16 bit words of program area from $000 to $7FF. ROM SPACE in the system is 2048 X 16 bits. (a) Vector Address Area ($000 to $004) The program is sequentially executed. There is an area address $000 through $004 that is reserved for a special interrupt service routine such as starting vector address ...
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... Data pointer for INX low nibble Data pointer for INX middle nibble Data pointer for INX high nibble Bit0: set PA.1, PA.2 as Alarm O/P Bit1: HEAVY LOAD Mode Bit2: LCD off Bit3: set LCD segment as outport Alarm Envelope Control Bit0: change LCD duty to 1/4 duty, 1/3 bias Reserved SH6612A Ver 0.3 ...
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... System Clock and Oscillator SH6612A has one clock source. Oscillator is determined by code option. The oscillator generates the basic clock pulses that provide the system clock to supply CPU and on-chip peripherals. System clock = FOSC/4. (a) Instruction cycle time: (1) 4/32768Hz ( 122.1 s) for 32768Hz oscillator. ...
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... Timer0 & Timer1 SH6612A has two 8-bit timers. The timer / counter has the following features: - 8-bit up-counting timer/counter. - Automatic re-loads counter. - 8-level prescaler. - Interrupt on overflow from $FF to $00. The following is a simplified timer block diagram. Tosc SYNC Fosc/4 PRESCALER COUNTER TM.2 TM.1 TM.0 The timers provide the following functions: - Programmable interval timer function ...
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... I/O Port SH6612A has 16 CMOS quasi-I/O ports, PORTA, PORTB, PORTC, PORTD. All I/O ports are bit programmable. If PORTA,B,C,D are pull-high internally weak drive. The equivalent circuit is below: Port I/O Data Register: (PDR) Address Bit3 $08 PORT A.3 $09 PORT B.3 $0A PORT C.3 $0B PORT D.3 Data-Out Data-In Bit2 PORT A.2 PORT B.2 PORT C ...
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... Four interrupt sources are available on SH6612A: - External interrupt ( INT shared with PA.0) - Timer0 interrupt - Timer1 interrupt PortB interrupts (falling edge) - Interrupt Control Bits and Interrupt Service The interrupt control flags are mapped on $00 and $01 of the system register. They can be accessed or tested by the program ...
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... Seg1 - 4 as output ports Bit 1 Bit 0 R/W - DUTY R/W 1: 1/4 duty, 1/3 bias Bit 2 Bit 1 Bit 0 COM3 COM2 COM1 - - DATA_BIT - - DATA_BIT - - DATA_BIT - - DATA_BIT 9/24 SH6612A Description Bit0: set PA.1, PA.2 as Alarm O/P Bit1: HEAVY LOAD Mode Bit2: LCD off Bit3: set LCD segment as outport Description LCD duty control Ver 0.3 ...
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... SEG9 313H SEG10 SEG10 314H SEG11 SEG11 315H SEG12 SEG12 316H SEG13 SEG13 317H SEG14 SEG14 318H SEG15 SEG15 319H 10/24 SH6612A Bit 0 COM1 SEG1 SEG2 SEG3 SEG4 Bit 3 Bit 2 Bit 1 COM4 COM3 COM2 SEG16 SEG16 SEG16 SEG17 SEG17 SEG17 SEG18 SEG18 ...
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... DD3 COM2 V COM2 DD2 V DD1 COM1 GND V DD3 V DD2 COM3 V DD1 GND V DD3 V DD2 COM4 V DD1 GND SEGn+1 V SEGn DD3 SEGn V DD2 V DD1 GND SEGn+1 V DD3 V DD2 V DD1 GND V COM4 - SEGn DD3 V DD2 V DD1 GND -V DD1 -V DD2 -V DD3 11/24 SH6612A Unlight Ver 0.3 ...
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... COM3 V COM1 DD2 V DD1 GND COM2 COM1 V DD2 COM2 V SEGn+2 DD1 GND V DD2 COM3 V DD1 GND SEGn+1 SEGn V COM4 DD2 V DD1 GND V DD2 SEGn V DD1 GND V SEGn+1 DD2 V DD1 GND V COM1 - SEGn DD2 V DD1 GND -V DD1 -V DD2 12/24 SH6612A Unlight Ver 0.3 ...
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... The consumption of power will increase during the use of the HLM mode, but it will not affect the RC oscillator. Note: The HLM needs about 5 instruction cycles to set-up the oscillation for 32.768KHz crystal oscillator. HLM waveform HLM Heavy load OFF 1ms or more 13/24 SH6612A Ver 0.3 ...
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... AEC = $0 PAM = 1 AEC = $8 PAM = 1 AEC = $C PAM = 1 AEC = $A PAM = 1 AEC = $F PAM = 1 14/24 SH6612A Remarks ALARM envelope control DC envelope 1Hz envelope 2Hz envelope 4Hz envelope 8Hz envelope RD $14 To Sound Mixer 16Hz 8Hz 4Hz 2Hz 1Hz $14 ...
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... After the execution of STOP instruction, SH6612A will enter stop mode. In stop mode, the whole chip (including oscillator) will stop operating. In HALT mode, SH6612A can be waked up if any interrupt occurs. In STOP mode, SH6612A can be waked up if port interrupt occurs or external interrupt occurs. R/W B0 ...
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... Mx & AC[3]; AC[0] CY; AC shift right one bit Function AC, AC, AC, AC, AC,Mx Mx & I Function AC;Mx Decimal adjust for add. AC;Mx Decimal adjust for sub. 16/24 SH6612A Flag Change Flag Change Flag Change CY CY Ver 0.3 ...
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... AC(1)= AC(2)= AC(3)= X(Not include p) PC ST; TBR hhhh; A llll CY; X(Include p) PC (PC11-PC8) (TBR) (A) No Operation I Immediate data Logical exclusive OR | Logical OR & Logical AND bbb RAM bank=000 TBR Table Branch Register 17/24 SH6612A Flag Change Flag Change CY Ver 0.3 ...
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... V 2.8 V 0.2 V 6.5 7.5 A 18/24 SH6612A = 32.768KHz, unless otherwise specified) OSC Conditions All output pins unload execute NOP instruction All output pins unload (HALT mode) exclude LCD current All output pins unload (STOP mode) LCD off, no current PORTA, PORTB, PORTC, PORTD PORTA, PORTB, PORTC, PORTD ...
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... SB2x SB1 Min. Typ. Max. 1.6 1.9 2.2 19/24 SH6612A = 32.768KHz, unless otherwise specified) OSC Conditions All output pins unload execute NOP instruction All output pins unload (HALT mode) exclude LCD current All output pins unload (STOP mode) LCD off, no current PORTA, PORTB, PORTC, PORTD ...
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... Unit reference only) variation caused by process variation (for 15 % reference only) 20/24 SH6612A Conditions reduces to I after instruction executing sb1 reduces to I after instruction executing sb2 Conditions reduces to I after instruction executing DD sb1 reduces to I after instruction executing DD sb3 ƒ ...
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... Application Circuits (for reference only) SH6612A chip substrate connects to system ground. AP1 OSC : RC: 262K (code option) LCD Panel: 1/4 duty, 1/3 bias; (S/W select 1/4 duty, auto 1/3 bias) LCD Panel: 1/3 duty, 1/3 bias; (S/W select 1/4 duty, auto 1/3 bias; ignore duty 4 segments) PORTA - D : I/O AP2 OSC: 32.768KHz crystal (code option) ...
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... V toV can regulate the voltage. DD DD1 LCD 1/2 bias 50K RESET 0.1uF OSCI SH6612A OSCO PORTB.1 GND TEST DD1 LCD 1/3 bias RESET SH6612A OSCI PORTA - D GND TEST 22/24 SH6612A 20p 32768Hz 20p V DD 750K Ver 0.3 ...
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... PORTB2 13 PORTB3 14 PORTC0 15 PORTC1 16 PORTC2 17 PORTC3 18 PORTD0 19 PORTD1 20 PORTD2 21 PORTD3 22 GND B1 23 OSCO 24 OSCI 25 COM4 Notice: The Pad Locations of SH6612A are different from the SH6612. Please pay attention ...
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... Change the description of “LCD divider resistor control” Use “LVR” instead of “LPD” Change the “Operating Ambient Temperature” Add AP4 0.2 Add pad location, “O/S” description, PORTD V 0.1 PII Spec 0.0 Original Package CHIP FORM SH6612A Specification Revision History Content , 24/24 SH6612A Nov.2003 Description Nov.2003 Octo.2003 Sept.2003 Date Ver 0 ...