ax88796blf ASIX Electronics Corporation, ax88796blf Datasheet - Page 42
ax88796blf
Manufacturer Part Number
ax88796blf
Description
Low-pin-count Non-pci 8/16-bit 10/100m Fast Ethernet Controller
Manufacturer
ASIX Electronics Corporation
Datasheet
1.AX88796BLF.pdf
(83 pages)
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5.1.26 Physical Address Register 0 (PAR0)
Page1 Offset 01H (Read/Write)
5.1.27 Physical Address Register 1 (PAR1)
Page1 Offset 02H (Read/Write)
5.1.28 Physical Address Register 2 (PAR2)
Page1 Offset 03H (Read/Write)
5.1.29 Physical Address Register 3 (PAR3)
Page1 Offset 04H (Read/Write)
5.1.30 Physical Address Register 4 (PAR4)
Page1 Offset 05H (Read/Write)
5.1.31 Physical Address Register 5 (PAR5)
Page1 Offset 06H (Read/Write)
Field
7:0
Field
7:0
Field
7:0
Field
7:0
Field
7:0
Field
7:0
The physical address registers are used to compare the destination address of incoming packets for rejecting or
accepting packets. Comparisons are performed on a byte wide basis. The bit assignment shown below relates the
sequence in PAR0 ~ PAR5 to the bit sequence of the received packet.
PAR0
PAR1
PAR2
PAR3
PAR4
PAR5
Name
Name
Name
Name
Name
Name
Description (Default = 00h)
Physical Address Register 0
Description (Default = 00h)
Physical Address Register 1
Description (Default = 00h)
Physical Address Register 2
Description (Default = 00h)
Physical Address Register 3
Description (Default = 00h)
Physical Address Register 4
Description (Default = 00h)
Physical Address Register 5
42
AX88796BLF / AX88796BLI
ASIX ELECTRONICS CORPORATION
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