ax88796blf ASIX Electronics Corporation, ax88796blf Datasheet - Page 82

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ax88796blf

Manufacturer Part Number
ax88796blf
Description
Low-pin-count Non-pci 8/16-bit 10/100m Fast Ethernet Controller
Manufacturer
ASIX Electronics Corporation
Datasheet

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Part Number
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Part Number:
AX88796BLF
Manufacturer:
ASIX
Quantity:
20 000
Reversion History
Revision
V1.0
V1.1
V1.2
V1.3
V1.4
V1.5
V1.6
V1.7
V1.8
V1.9
V1.10
V1.11
V1.12
V1.13
2006/03/01
2008/01/23
2008/06/06
2008/10/01
Date
2006/03/31
2006/09/08
2006/09/20
2006/10/05
2007/03/19
2007/04/27
2007/08/18
2008/01/30
2008/05/06
2008/10/21
Initial Release.
1. Correct some typo errors.
1. Correct the pin descriptions of pin 60 and 63 in Figure 2 and Section
1. Add US patent approved (NO 6799231) and VLAN in the Features
1. Modify the description of SA5/FIFO_SEL pin in Section 2.1 and
1. Correct a typo in Revision History table.
1. Correct the typo error of the Twrl value.
1. Modify some information of the power-up sequence in Section 7.3.3.
1. Modify the “US Patent Approval” string in the Features page.
1. Added some descriptions in Section 1.1.
1. Add Trise2, Trise3 and Tdelay32 timing information in Section 7.3.3.
Comment
2. Change page3 offset 0Dh register name from P30D to MISC.
3. Change the name of bit 5 of MCR register from TQCE to BBTC.
4. Define a short name “TXCQF” for bit 7 of CTEPR register.
5. Add the default values of PHY registers into Section 5.2.
2. Correct the Wakeup Frame registers configuration information in
3. Update the reference schematics in Section 7.3.2, Appendix A1.
4. Remove Demonstration Circuit A, B, C reference schematics.
1. Modify the resistance value of pin 64 (RSET_BG) from 11.8 ± 1% K
1. Add Thermal Resistance values (Θ
2. Correct the SD[7:0] values of Read cycle in Appendix A3 “186-like
3. Correct the SD[7:0] and SD[15:8] values of offset 1Fh register Read
2. Change the product name in the Features page.
3. Correct the TPI+/TPI- pin name of AX88796B Pin Out Diagram in
4. Modify some pin descriptions in Section 2.2 and 2.5.
5. Modify the Wake-up Configuration descriptions in Section 4.3.1 and
6. Change the Storage Temperature to –65 to 150 °C in Section 7.1.
7. Add Appendix A5 to indicate the reference connection for big-endian
8. Add Appendix B to indicate how to disable the internal regulator.
2. Swapped the pin name of XTALIN and XTALOUT in Section 2.5
2. Add some information into Section 7.2.
2. Add the on-chip voltage regulator driving current information in
3. Add the Power-up Sequence Timing in Section 7.3.3.
4. Modify the Reset Timing chart in Section 7.3.2.
5. Modify some information in Appendix B.
1. Modify some information in Appendix A1 ~ A4.
2. Remove the min. value of Tdelay32 and Trise2/Trise3 timing in
2. Modified some descriptions in Section 4.5.
2-5.
Section 4.3.1.
ohm to 12.1 ± 1% K ohm.
7.3.2.
(16-bit)”.
cycle in Appendix A1~A4.
page.
Section 1.3.
5.1.54.
processor.
Appendix A4.
and Figure 2.
Section 5.1.56.
Section 7.3.3.
82
AX88796BLF / AX88796BLI
ASIX ELECTRONICS CORPORATION
Jc,
Θ
JA
) of Junction in Section

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