em65567 ELAN Microelectronics Corp, em65567 Datasheet - Page 53

• Manufacturer Part Number: em65567
• Description: Com/ Color Driver
• Manufacturer: ELAN Microelectronics Corp

8.2 Functions of Control Registers
The EM65567 has many control registers. In case of control register access, upper nibble of data bus (D7~D4) represent
register address, lower nibble of data bus (D3~D0) represent data. The access example is shown in the following. The Pins
(CSB, RS, RDB, WRB) setting are for 80-family MPU interface. Only the setting of terminal (RDB,WRB) is different, when
it is accessed by the 68-fanily MPU.
(Example) X Address
In the writing to the control register, it is used directly as addressing D7~D4 of the data bus. In case of register read, first set
RA register for specific register address, next can read specific register. Therefore, it is need 2-step for register read. Then,
specific register output to D3~D0 of data bus. Except D3~D0 of data bus are all “H”. Prohibit access to undefined register
address area. When RS is “L”, all read/write operations are accessed to display RAM. Then data bus doesn’t include register
address. In case of write, D3~D0 data is written to the register designated at D7~D4 in rising edge of the WRB signal. In case
of read, register can output to data bus is RDB active period. Control register and display RAM are the equal access timing.
8.2.1 Data Write to Display RAM
The Display RAM data of 8-bit are written in the designated X and Y address.
8.2.2 Data Read from Display RAM
The 8-bit contents of Display RAM designated in X. and Y address and read out.
Immediately after data are set in X and Y address, dummy read is necessary one time.
8.2.3 Internal Register Data Read
※ Mark shows “Don’t care”
This command is used to read data from an internal register. Before executing the command. You need to set the address and
RE flag for reading data from the internal register.
8.2.4 X Address Register Set
* This specification is subject to be changed without notice.
D7
D7
D7
D7
※
0
D6
D6
D6
D6
※
0
D7
Display RAM write data
0
Display RAM read data
Register address
D5
D5
D5
D5
※
0
D6
0
D4
D4
D4
D4
※
0
D5
0
Internal Register read data
AX3
D3
D3
D3
D3
D4
0
AX2
AX3 AX2 AX1 AX0
D2
D2
D2
D2
D3
AX1
D2
D1
D1
D1
D1
Data
D1
AX0
D0
D0
D0
D0
D0
CSB
CSB
CSB
CSB
0
0
0
0
53
66 COM/ 96 SEG 256 Color STN LCD Driver
CSB
0
RS
RS
RS
RS
0
0
1
1
Pins setting
RS
RDB WRB RE2
RDB WRB RE2
RDB WRB RE2
RDB WRB RE2
1
1
0
0
1
RDB WRB RE2
1
0
1
1
0
0
0/1
0/1
0/1
0
RE1
RE1
RE1
RE1
0/1
0/1
0/1
0
Register Bank
0
RE1
RE0
RE0
RE0
RE0
0/1
0/1
0/1
0
0
2003/1/9 (V0.1)
RE0
0
EM65567