ql2005 QuickLogic Corp, ql2005 Datasheet

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ql2005

Manufacturer Part Number
ql2005
Description
3.3v 5.0v Pasic Fpga
Manufacturer
QuickLogic Corp
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
QL2005
Manufacturer:
QUICKLOGIC
Quantity:
20 000
Part Number:
ql2005-1PF144C
Quantity:
4 432
Part Number:
ql2005-1PF144C
Manufacturer:
QUICKLOGIC
Quantity:
465
Part Number:
ql2005-1PL84C
Manufacturer:
TFK
Quantity:
830
Part Number:
ql2005-2PF144C
Manufacturer:
QUICKLOGIC
Quantity:
319
Part Number:
ql2005-OPL84C
Manufacturer:
QUICKLO
Quantity:
20 000
Part Number:
ql2005-XPF144C
Manufacturer:
QUICKLOGIC
Quantity:
513
Part Number:
ql2005-XPF144C
Manufacturer:
QUICKLOGIC
Quantity:
20 000
usable ASIC gates,
Block Diagram
HIGHLIGHTS
156 I/O pins
… 5,000
pASIC 2
QL2005
Logic
Cells
320
-Abundant, high-speed interconnect eliminates manual routing
-Flexible logic cell provides high efficiency and performance
-Design tools produce fast, efficient Verilog/VHDL synthesis
-16-bit counter speeds exceeding 200 MHz
-5,000 usable gates, 8,000 usable PLD gates, 156 I/Os
-3-layer metal ViaLink process for small die sizes
-100% routable and pin-out maintainable
-Complex functions (up to 16 inputs) in a single logic cell
-High synthesis gate utilization from logic cell fragments
-Full IEEE Standard JTAG boundary scan capability
-Individually-controlled input/feedback registers and OEs on all I/O pins
-3.3V and 5.0V operation with low standby power
-I/O pin-compatibility between different devices in the same packages
-PCI compliant (at 5.0V), full speed 33 MHz implementations
-High design security provided by security fuses
Combining Speed, Density, Low Cost and Flexibility
Ultimate Verilog/VHDL Silicon Solution
Speed, Density, Low Cost and Flexibility in One Device
Advanced Logic Cell and I/O Capabilities
Other Important Family Features
3-15
3.3V and 5.0V pASIC 2 FPGA
QL2005
Rev. C
3

Related parts for ql2005

ql2005 Summary of contents

Page 1

... OEs on all I/O pins Other Important Family Features -3.3V and 5.0V operation with low standby power -I/O pin-compatibility between different devices in the same packages -PCI compliant (at 5.0V), full speed 33 MHz implementations -High design security provided by security fuses QL2005 Block Diagram 320 Logic Cells 3.3V and 5.0V pASIC 2 FPGA 3-15 QL2005 Rev ...

Page 2

... The QL2005 is a 5,000 usable ASIC gate, 8,000 usable PLD gate member of PRODUCT the pASIC 2 family of FPGAs. pASIC 2 FPGAs employ a unique SUMMARY combination of architecture, technology, and software tools to provide high speed, high usable density, low price, and flexibility in the same devices. ...

Page 3

... QL2005 PINOUT DIAGRAM 84-PIN PLCC 3-17 3 ...

Page 4

... PINOUT DIAGRAMS PIN # 1 QL2005-1PF144C PIN # 37 PIN # 1 QL2005-1PQ208C PIN # 53 144-PIN TQFP pASIC 208-PIN PQFP pASIC 3-18 QL2005 PIN # 109 PIN # 73 PIN # 157 PIN # 105 ...

Page 5

... QL2005 PQFP 208 and TQFP 144 Pinout Table 208 144 Function 208 144 Function PQFP TQFP PQFP TQFP 1 144 VCC ...

Page 6

... Can be configured as an input and/or output. Connect to 3.3V supply. Connect to ground. QL 2005 - 1 PQ208 C QuickLogic pASIC device pASIC 2 device part number Speed Grade X = quick 0 = fast 1 = faster 2 = fastest 3-20 QL2005 Operating Range C = Commercial I = Industrial Package Code PL84 = 84-pin PLCC PF144 = 144-pin TQFP PQ208 = 208-pin PQFP ...

Page 7

... QL2005 ABSOLUTE MAXIMUM RATINGS Supply Voltage ……………….. -0.5 to 7.0V Input Voltage ……….… -0.5 to VCC +0.5V ESD Pad Protection ….…………… 2000V DC Input Current ….……………… Latch-up Immunity ………………. 200 mA ...

Page 8

... QuickLogic customer engineering. Industrial Commercial Min Max Min 3.0 3.6 3.0 - 0.56 2.74 0.61 0.56 2.21 0.61 0.56 1.85 0.61 Conditions IOH = -2.4 mA IOH = -10 A IOL = 4 mA IOL = 10 A 5.5V > VI > VCC VI = VCC or GND VI = VCC or GND VO = GND VO = VCC VI, VIO = VCC or GND 3-22 QL2005 Unit Max 3 2.65 2.14 1.79 Min Max Unit 2.0 V 0.8 V 2.4 V VCC-0.1 V 0 ...

Page 9

... QL2005 AC CHARACTERISTICS at VCC = 5V 1.00) Propagation delays depend on routing, fanout, load capacitance, supply voltage, junction temperature, and process variation. The AC Characteristics are a design guide to provide initial timing estimates at nominal conditions. Worst case estimates are obtained when nominal propagation delays are multiplied by the appropriate Delay Factor specified in the Delay Factor table (Operating Range) ...

Page 10

... The following loads are used for tPXZ: Propagation Delays (ns) Loads per Half Column [10 2.2 2.2 2.3 1.2 1.2 1.2 1.5 1.6 1.6 Propagation Delays (ns) Fanout [ 1.8 2.1 2.4 4.8 4.8 4.8 0.0 0.0 0.0 0.8 1.1 1.4 0.7 1.0 1.3 4.1 4.1 4.1 0.0 0.0 0.0 Propagation Delays (ns) Output Load Capacitance (pF 2.6 3.0 2.8 3.3 2.1 2.6 2.6 3.3 2.9 3.3 tPHZ 3-24 QL2005 2.4 2.5 2.6 1.2 1.2 1.2 1.2 1.7 1.8 1.9 2 2.7 3.9 4.6 4.8 4.8 4.8 0.0 0.0 0.0 1.7 2.9 3.6 1.6 2.8 3.5 4.1 4.1 4.1 0.0 0.0 0.0 75 100 150 3.6 4.1 5.2 3.9 4.5 5.7 3.1 3.7 4.8 4.1 4.9 6.5 1K tPLZ 5 pF ...

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