UPD4616112-X NEC [NEC], UPD4616112-X Datasheet

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UPD4616112-X

Manufacturer Part Number
UPD4616112-X
Description
16M-BIT CMOS MOBILE SPECIFIED RAM 1M-WORD BY 16-BIT EXTENDED TEMPERATURE OPERATION
Manufacturer
NEC [NEC]
Datasheet
Document No. M15794EJ2V0DS00 (2nd edition)
Date Published January 2002 NS CP (K)
Printed in Japan
Description
specified RAM featuring low power static RAM compatible function and pin configuration.
Features
The
The PD4616112-X is fabricated with advanced CMOS technology using one-transistor memory cell.
The PD4616112-X is packed in 48-pin TAPE FBGA.
1,048,576 words by 16 bits organization
Fast access time: 85, 95 ns (MAX.)
Byte data control: /LB (I/O0 - I/O7), /UB (I/O8 - I/O15)
Low voltage operation: V
Operating ambient temperature: T
Output Enable input for easy application
Chip Enable input: /CS pin
Standby Mode input: MODE pin
Standby Mode1: Normal standby (Memory cell data hold valid)
Standby Mode2: Memory cell data hold invalid
PD4616112-BxxLX
Product name
PD4616112-X is a high speed, low power, 16,777,216 bits (1,048,576 words by 16 bits) CMOS mobile
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
CC
Access time
16M-BIT CMOS MOBILE SPECIFIED RAM
EXTENDED TEMPERATURE OPERATION
ns (MAX.)
= 2.6 to 3.1 V
85, 95
A
= –25 to +85 °C
The mark
1M-WORD BY 16-BIT
Operating supply
2.6 to 3.1
Voltage
DATA SHEET
shows major revised points.
Operating ambient
temperature
–25 to +85
°C
MOS INTEGRATED CIRCUIT
PD4616112-X
At operating
mA (MAX.)
35
Supply current
©
At standby
A (MAX.)
70 / 10
2001

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UPD4616112-X Summary of contents

Page 1

CMOS MOBILE SPECIFIED RAM EXTENDED TEMPERATURE OPERATION Description The PD4616112 high speed, low power, 16,777,216 bits (1,048,576 words by 16 bits) CMOS mobile specified RAM featuring low power static RAM compatible function and pin configuration. The PD4616112-X ...

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Ordering Information Part number PD4616112F9-B85LX-BC2 48-pin TAPE FBGA ( PD4616112F9-B95LX-BC2 Marking Image Part number PD4616112F9-B85LX-BC2 PD4616112F9-B95LX-BC2 J MS16M0-XX Lot number Index mark 2 Package Access time Operating ns (MAX.) supply voltage 85 2.6 to 3.1 95 Marking (XX) ...

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Pin Configuration /xxx indicates active low signal. Top View /LB / I/O8 / I/O9 I/O10 GND I/O11 A17 I/O12 ...

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Block Diagram V CC GND Refresh counter A0 Address buffer A19 I/O0 - I/O7 I/O8 - I/O15 /CS MODE /LB /UB /WE /OE 4 Standby mode control Refresh control Memory cell array 16,777,216 bits Row decoder Sense amplifier / Switching ...

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Truth Table /CS MODE /OE /WE /LB / Caution MODE pin must be ...

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Electrical Specifications Absolute Maximum Ratings Parameter Symbol Supply voltage Input / Output voltage Operating ambient temperature Storage temperature Note –1.0 V (MIN.) (Pulse width: 30 ns) Caution Exposing the device to stress above those listed in Absolute Maximum Rating could ...

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DC Characteristics (Recommended Operating Conditions Unless Otherwise Noted) Parameter Symbol Input leakage current I/O leakage current I/O / Operating supply current ...

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Standby Mode State Machine / MODE = MODE = V Standby Mode1 Standby Mode Characteristics Standby Mode Memory Cell Data Hold Mode 1 Valid Mode 2 Invalid 8 Power on /CS ...

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AC Characteristics (Recommended Operating Conditions Unless Otherwise Noted) AC Test Conditions [ PD4616112-B85LX, PD4616112-B95LX ] Input Waveform (Rise and Fall Time Vcc 0.8 Vcc 0.2 Vcc GND 5ns Output Waveform Output Load AC characteristics directed with the note should be ...

Page 10

Read Cycle (B version) Parameter Symbol Read cycle time Identical address read cycle time Address skew time t /CS pulse width Address access time /CS access time /OE to output valid /LB, /UB to output valid Output hold from address ...

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Read Cycle Timing Chart 1 t SKEW Address (Input (Input) /CS (Input) /OE (Input) /LB, /UB High impedance (Output) I/O t SKEW Address (Input (Input) /CS (Input) /OE (Input) /LB, /UB High impedance (Output) I/O Caution ...

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Read Cycle Timing Chart SKEW SKEW Address (Input) t ACS (Input) /CS t CLZ (Input) / OLZ (Input) /LB, / BLZ High impedance Data out (Output) I/O ...

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Read Cycle Timing Chart SKEW Address (Input) t ACS /CS (Input) t CLZ t OE (Input) /OE t OLZ (Input BLZ Hi-Z (Output) I/O0~7 Data out (Input) / BLZ ...

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Read Cycle Timing Chart 4 t SKEW Address (Input) t (Input) /CS (Input) /OE (Input) /LB, /UB (Output) I/O High impedance Caution If the address is changed using a value that is either lower than the minimum value or higher ...

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Write Cycle (B version) Parameter Symbol Write cycle time Identical address write cycle time Address skew time t /CS to end of write /LB, /UB to end of write Address valid to end of write Write pulse width Write recovery ...

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Definition of write start and write end /CS Write start pattern Write start pattern 2 L Write start pattern 3 L Write end pattern 1 L Write end pattern Definition of write ...

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Write Cycle Timing Chart 1 t SKEW Address (Input (Input) /CS (Input) / (Input) /LB, /UB High impedance (Input) I/O t SKEW Address (Input) (Input) /CS (Input) /WE (Input) /LB, /UB High impedance (Input) I/O Cautions ...

Page 18

Write Cycle Timing Chart 2 (/WE Controlled SKEW Address (Input /CS (Input) /WE (Input /OE (Input I/O (Input / Output) High impedance t SKEW Address (Input) /CS ...

Page 19

Write Cycle Timing Chart 3 (/CS Controlled) Address (Input) /CS (Input /WE (Input) /LB, /UB (Input) I/O (Input) High impedance Address (Input) /CS (Input /WE (Input) /LB, /UB (Input) I/O (Input) High impedance Cautions 1. During ...

Page 20

Write Cycle Timing Chart 4 (/LB, /UB Controlled 1) t SKEW Address (Input /CS (Input /WE (Input /LB, /UB (Input) High impedance I/O (Input) Address (Input) /CS (Input) /WE (Input /LB, /UB ...

Page 21

Write Cycle Timing Chart 5 (/LB, /UB Controlled 2) t SKEW Address (Input) /CS (Input) /WE (Input /LB, /UB (Input) I/O (Input) High impedance Cautions 1. During address transition, at least one of pins /CS, /WE should be ...

Page 22

Write Cycle Timing Chart 6 (/LB, /UB Independent Controlled 1) Address (Input) /CS (Input) /WE (Input) /LB (Input /UB (Input) I/ (Input) High impedance I/ (Input) High impedance Cautions 1. During address transition, at ...

Page 23

Write Cycle Timing Chart 7 (/LB, /UB Independent Controlled 2) Address (Input) /CS (Input) /WE (Input) /LB (Input /UB (Input) I/ (Input) High impedance I/ (Input) High impedance Cautions 1. During address transition, at ...

Page 24

Read Write Cycle (B version) Parameter Symbol Read write cycle time t RWC Byte write setup time t BWS Byte read setup time t BRS Notes 1. Make settings so that the sum (t address write cycle time (t WC1 ...

Page 25

Read Write Cycle Timing Chart 1 (/LB, /UB Independent Controlled 1) Address (Input) /CS (Input) /WE (Input) /LB (Input) /UB (Input (Output) High impedance I/ (Input) High impedance Cautions 1. During address transition, at ...

Page 26

Read Write Cycle Timing Chart 2 (/LB, /UB Independent Controlled 2) Address (Input) /CS (Input) /WE (Input) /LB (Input /UB (Input) I/ (Input) High impedance I/ (Output) Cautions 1. During address transition, at least ...

Page 27

Read Write Cycle Timing Chart 3 (/LB, /UB Independent Controlled 3) Address (Input) /CS (Input) /WE (Input /LB (Input) /UB (Input) I/ (Input) High impedance I/ (Output) Cautions 1. During address transition, at least ...

Page 28

Standby Mode 2 entry and recovery Timing Chart Address (Input) MODE (Input) /CS (Input Standby Mode 2 (Data invalid) Parameter Symbol /CS High to MODE Low t CM Cautions 1. Make MODE and /CS high level during the ...

Page 29

Package Drawing 48-PIN TAPE FBGA (8x6) E INDEX MARK Data Sheet M15794EJ2V0DS PD4616112 ...

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Recommended Soldering Conditions Please consult with our sales offices for soldering conditions of the PD4616112-X. Type of Surface Mount Device PD4616112F9-BxxLX-BC2: 48-pin TAPE FBGA ( Data Sheet M15794EJ2V0DS PD4616112-X ...

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NOTES FOR CMOS DEVICES 1 PRECAUTION AGAINST ESD FOR SEMICONDUCTORS Note: Strong electric field, when exposed to a MOS device, can cause destruction of the gate oxide and ultimately degrade the device operation. Steps must be taken to stop generation ...

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The information in this document is current as of January, 2002. The information is subject to change without notice. For actual design-in, refer to the latest publications of NEC's data sheets or data books, etc., for the most up-to-date specifications ...

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