UPD70208HGF-12-3B9 NEC [NEC], UPD70208HGF-12-3B9 Datasheet - Page 12
UPD70208HGF-12-3B9
Manufacturer Part Number
UPD70208HGF-12-3B9
Description
V40HLTM, V50HLTM 16/8, 16-BIT MICROPROCESSOR
Manufacturer
NEC [NEC]
Datasheet
1.UPD70208HGF-12-3B9.pdf
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12
DIFFERENCES FROM V40 AND V50
Clock generator
(CG)
Operating supply voltage
O p e r a t i n g
frequency
Internal I/O relocation
function
Wait control unit (WCU)
Refresh control unit
(REFU)
Serial control unit (SCU)
DMA control unit (DMAU)
Standby functions
Notes 1. Divided into 3 when a reset is performed.
2. Not divided when a reset is performed.
Item
V
V
DD
DD
= 5 V
= 3 V
3 V, 5 V
MAX. : 10, 12.5, 16, 20 MHz
MIN. : DC
MAX. : 5, 6.25, 8, 10 MHz
MIN. : DC
Variable scaling factor
Variable instruction cycle time
Maximum input frequency: 40 MHz
Switchable 8-bit boundary or 16-bit boundary
relocation function
Memory space: 5 divisions
I/O space: 3 divisions
Refresh address: 16 bits
REFRQ extended timing supported
Dedicated baud rate generator incorporated
selectable)
HALT mode, STOP mode
PD71071/71037 subset (either function
V40HL, V50HL
Data Sheet U13225EJ4V0DS00
Note 2
Note 1
5 V
MAX. : 8, 10 MHz
MIN. : 2 MHz
No operation
Fixed scaling factor
Fixed instruction cycle time
Maximum input frequency: 20 MHz
V40: Relocation possible on 8-bit boundary
V50: Relocation possible on 16-bit boundary
Memory space: 3 divisions
I/O space: Not divided
Refresh address: 9 bits
No REFRQ extended timing
No dedicated baund rate generator
incorporated
HALT mode only
PD71071 subset
PD70208H, 70216H
V40, V50
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