UPD70208HGF-12-3B9 NEC [NEC], UPD70208HGF-12-3B9 Datasheet - Page 91
UPD70208HGF-12-3B9
Manufacturer Part Number
UPD70208HGF-12-3B9
Description
V40HLTM, V50HLTM 16/8, 16-BIT MICROPROCESSOR
Manufacturer
NEC [NEC]
Datasheet
1.UPD70208HGF-12-3B9.pdf
(110 pages)
- Current page: 91 of 110
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HLDRQ/HLDAK Timing (1)
HLDRQ/HLDAK Timing (2)
BS0-BS2 (Output)
CLKOUT (Output)
BS0-BS2 (Output)
CLKOUT (Output)
HLDAK (Output)
HLDAK (Output)
Note
Remark A dashed line indicates high impedance.
Note
Remark A dashed line indicates high impedance.
HLDRQ (Input)
HLDRQ (Input)
Note
A16/PS0 to A19/PS3, UBE, BUFEN, BUFR/W, MRD, IORD, MWR, IOWR (all output): V40HL, V50HL
A8-A15 (output): V40HL AD0-AD7 (input/output): V40HL AD0-AD15 (input/output) V50HL
A16/PS0 to A19/PS3, UBE, BUFEN, BUFR/W, MRD, IORD, MWR, IOWR (all output): V40HL, V50HL
A8-A15 (output): V40HL AD0-AD7 (input/output): V40HL AD0-AD15 (input/output) V50HL
Note
TI
<52>
<51>
TI
Data Sheet U13225EJ4V0DS00
TI
<32>
<51>
<32>
<52>
<6>
or longer
TI
TI
<51>
T4
<49>
TI
Variation Range
Highest-Priority Refresh
Cycle or DMA Cycle
PD70208H, 70216H
<27>
<52>
T1
Highest-Priority Refresh
Cycle or DMA Cycle
T4
<27>
T2
<27>
T1
91
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