DS2430A+R DALLAS [Dallas Semiconductor], DS2430A+R Datasheet
DS2430A+R
Related parts for DS2430A+R
DS2430A+R Summary of contents
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FEATURES 256-bit Electrically Erasable Programmable Read Only Memory (EEPROM) plus 64-bit one-time programmable application register Unique, factory-lasered and tested 64-bit registration number (8-bit family code + 48-bit serial number + 8-bit CRC tester) assures absolute identity because no two ...
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DESCRIPTION The DS2430A 256-bit 1-Wire EEPROM identifies and stores relevant information about the product to which it is associated. This lot or product specific information can be accessed with minimal interface, for example a single port pin of a microcontroller. ...
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DS2430A BLOCK DIAGRAM Figure ...
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HIERARCHICAL STRUCTURE FOR 1-WIRE PROTOCOL Figure 2 64-BIT LASERED ROM Figure 3 8-Bit CRC Code MSB 1-WIRE CRC GENERATOR Figure 4 48-Bit Serial Number LSB MSB 8 5 Polynomial = 8-Bit Family ...
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MEMORY The memory of the DS2430A consists of three separate sections, called data memory, application register, and status register (Figure 5). The data memory and the application register each have its own intermediate storage area called scratchpad that acts as ...
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MEMORY FUNCTION FLOW CHART Figure 6 COPY SCRATCHPAD [55h] After the data stored in the scratchpad has been verified the master may send the Copy Scratchpad command followed by a validation key of A5h to transfer data from the scratchpad ...
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MEMORY FUNCTION FLOW CHART Figure 6 (cont’d) WRITE APPLICATION REGISTER [99h] This command is essentially the same as the Write Scratchpad command, but it addresses the 64-bit register scratchpad. After issuing the command code, the master must provide a 1-byte ...
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MEMORY FUNCTION FLOW CHART Figure 6 (cont’d) READ APPLICATION REGISTER [C3h] This command is used to read the application register or the register scratchpad. As long as the application register is not yet locked, one will receive data from the ...
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BUS SYSTEM The 1-Wire bus is a system that has a single bus master and one or more slaves. In all instances, the DS2430A is a slave device. The bus master is typically a microcontroller. The discussion of this ...
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ROM FUNCTIONS FLOW CHART Figure ...
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Transaction Sequence The sequence for accessing the DS2430A via the 1-Wire port is as follows: Initialization ROM Function Command Memory Function Command Transaction/Data INITIALIZATION All transactions on the 1-Wire bus begin with an initialization sequence. The initialization sequence consists of ...
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After one complete pass, the bus master knows the contents of the ROM in one device. The remaining number of devices and their ROM codes may be identified by additional passes. See Application Note 187 for a comprehensive discussion of ...
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READ/WRITE TIMING DIAGRAM Figure 10 Write-1 Time Slot Write-0 Time Slot Read-data Time Slot ...
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MEMORY FUNCTION EXAMPLE Example: Write 2 data bytes to data memory location 0006 and 0007. Read entire data memory. MASTER MODE DATA (LSB FIRST <2 Data Bytes> <2 ...
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ABSOLUTE MAXIMUM RATINGS* Voltage on DATA to Ground Operating Temperature Range Storage Temperature Range Soldering Temperature * This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the ...
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NOTES: 1) All voltages are referenced to ground external pullup voltage. PUP 3) Input load is to ground additional reset or communication sequence cannot begin until the reset high time has expired. 5) Read data ...