DS1251Y-150 DALLAS [Dallas Semiconductor], DS1251Y-150 Datasheet
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DS1251Y-150
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DS1251Y-150 Summary of contents
Page 1
... DESCRIPTION The DS1251Y 4096K NV SRAM with Phantom Clock is a fully static nonvolatile RAM (organized as 512K words by 8 bits) with a built–in real time clock. The DS1251Y has a self–contained lithium energy source and control circuitry which constantly monitors V tolerance condition. When such a condition occurs, the ...
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... CO OE dress access. RAM WRITE MODE The DS1251Y is in the write mode whenever the WE and CE signals are in the active (low) state after address inputs are stable. The latter occurring falling edge will determine the start of the write cycle. The write cycle is terminated by the earlier rising edge ...
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... HEX VALUE This pattern is sent to the Phantom DS1251Y 032697 3/12 ...
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... DS1251Y PHANTOM CLOCK REGISTER DEFINITION Figure 2 REGISTER 12/ AM-PM/12/24 MODE Bit 7 of the hours register is defined as the 12– or 24–hour mode select bit. When high, the 12–hour mode is selected. In the 12–hour mode, bit 5 is the AM/PM bit with logic high being PM. In the 24– ...
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... IL SYMBOL MIN TYP I –1 –1 –1 2 5.0 CCS1 I 3.0 CCS2 I CC01 SYMBOL MIN TYP I/O DS1251Y ( MAX UNITS NOTES 10%) CC MAX UNITS NOTES + ...
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... ODW t 5 OEW 1TTL Gate 0–3 volts 1.5 volts 1.5 volts DS1251Y-150 UNITS UNITS MIN MAX 150 ns 150 150 150 ns 100 ...
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... 100 CW t 200 RST t PF SYMBOL MIN TYP 300 REC SYMBOL MIN TYP DS1251Y ( 4.5 to 5.5V) CC MAX UNITS NOTES ns 100 ns 100 ...
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... DS1251Y MEMORY READ CYCLE (NOTE 1) ADDRESSES Ï Ï Ï Ï Ï Ï CE Ï Ï Ï Ï Ï Ï Ï Ï Ï Ï Ï Ï Ï OE Ï Ï Ï Ï Ï Ï Ï D OUT MEMORY WRITE CYCLE 1 (NOTES 2, 6, AND 7) ADDRESS Ï Ï Ï Ï Ï Ï Ï Ï Ï ...
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... OEW Ì Ì Ì Ì Ì Ì Ì Ì Ì Ì Ì Ì Ì Ì Ì Ì DATA IN STABLE ODO Ì Ì Ì Ì Ì Ì DS1251Y 032697 9/12 ...
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... DS1251Y WRITE CYCLE TO PHANTOM CLOCK Ì Ì Ì Ì Ì Ì Ì D Ì Ì Ì Ì Ì Ì Ì POWER-DOWN/POWER-UP CONDITION V CC 4.50V 3. LEAKAGE CURRENT I L SUPPLIED FROM LITHIUM CELL 032697 10/ ...
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... C. Post solder cleaning with water washing techniques is acceptable, provided that ultrasonic vibration is not used. during write cycle, the output buffers remain in a high impedance state. is measured from the latter going low to the WP with the clock oscillator running. CC 032697 11/12 DS1251Y ...
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... DS1251Y DS1251Y 4096K NV SRAM WITH PHANTOM CLOCK 032697 12/ PKG 32–PIN DIM MIN MAX A IN. 1.720 1.740 MM 43.69 44.20 B IN. 0.720 0.740 MM 18.29 18.80 C IN. 0.395 0.415 MM 10.03 10.54 D IN. 0.090 0.120 MM 2.29 3.05 E IN. 0.017 0.030 MM 0.43 0.76 F IN. 0.120 0.160 MM 3.05 4.06 G IN. 0.090 0.110 MM 2.29 2.79 H IN. ...