UPD703003AGC-33 NEC [NEC], UPD703003AGC-33 Datasheet

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UPD703003AGC-33

Manufacturer Part Number
UPD703003AGC-33
Description
V853TM 32-/16-BIT SINGLE-CHIP MICROCONTROLLERS
Manufacturer
NEC [NEC]
Datasheet

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UPD703003AGC-33-204-8EU
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Document No. U13188EJ4V0DS00 (4th edition)
Date Published July 2000 N CP(K)
Printed in Japan
designed for real-time control operations. These microcontrollers provide on-chip features including a 32-bit CPU
core, ROM, RAM, an interrupt controller, a real-time pulse unit, a serial interface, an A/D converter, a D/A converter,
and PWM.
designing.
FEATURES
• Number of instructions: 74
• Minimum instruction execution time: 30 ns (@ 33 MHz operation)
• General-purpose registers: 32 bits
• Instruction set optimized for control applications
• On-chip memory
• Advanced on-chip interrupt controller
• Real-time pulse unit suitable for control operations
• Powerful serial interface (on-chip dedicated baud rate generator)
• On-chip clock generator
• 10-bit resolution A/D converter: 8 channels
• 8-bit resolution D/A converter: 2 channels
• 8-/9-/10-/12-bit resolution PWM: 2 channels
• Power saving functions
APPLICATIONS
• AV: Camcorders, VCRs, etc.
• Office equipment: PPCs, LBPs, printers, etc.
• Industrial equipment: Motor controllers, NC machine tools, etc.
• Communications equipment: Mobile telephones, etc.
The PD703003A, 703004A, and 703025A are members of the V850 Family
Detailed function descriptions are provided in the following user’s manuals. Be sure to read them before
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for availability
and additional information.
32-/16-BIT SINGLE-CHIP MICROCONTROLLERS
PD703003A, 703004A, 703025A
ROM: 256 KB ( PD703025A)
RAM: 8 KB ( PD703025A)
V853 User’s Manual Hardware:
V850 Family User’s Manual Architecture: U10243E
128 KB ( PD703003A)
96 KB ( PD703004A)
4 KB ( PD703003A, 703004A)
The mark
32 registers
DATA SHEET
shows major revised points.
V853
TM
MOS INTEGRATED CIRCUIT
U10913E
TM
of 32-bit single-chip microcontrollers
©
1998

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UPD703003AGC-33 Summary of contents

Page 1

PD703003A, 703004A, 703025A 32-/16-BIT SINGLE-CHIP MICROCONTROLLERS The PD703003A, 703004A, and 703025A are members of the V850 Family designed for real-time control operations. These microcontrollers provide on-chip features including a 32-bit CPU core, ROM, RAM, an interrupt controller, a real-time pulse ...

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ORDERING INFORMATION Part Number PD703003AGC-25-xxx-8EU 100-pin plastic LQFP (fine pitch) (14 PD703003AGC-33-xxx-8EU 100-pin plastic LQFP (fine pitch) (14 PD703004AGC-25-xxx-8EU 100-pin plastic LQFP (fine pitch) (14 PD703004AGC-33-xxx-8EU 100-pin plastic LQFP (fine pitch) (14 PD703025AGC-25-xxx-8EU 100-pin plastic LQFP (fine pitch) (14 PD703025AGC-33-xxx-8EU ...

Page 3

PIN NAMES A16 to A19: Address Bus AD0 to AD15: Address/Data Bus ADTRG: AD Trigger Input ANI0 to ANI7: Analog Input ANO0, ANO1: Analog Output ASTB: Address Strobe AV : Analog Power Supply Analog Reference ...

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INTERNAL BLOCK DIAGRAM NMI INTC INTP110 to INTP113 INTP120 to INTP123 INTP130 to INTP133 INTP140 to INTP143 TO110, TO111 TO120, TO121 RPU TO130, TO131 TO140, TO141 TCLR11 to TCLR14 TI11 to TI14 SIO SO0/TXD0 SI0/RXD0 UART0/CSI0 SCK0 BRG0 SO1/TXD1 SI1/RXD1 ...

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DIFFERENCES AMONG PRODUCTS ............................................................................................ 2. PIN FUNCTIONS .............................................................................................................................. 2.1 Port Pins ................................................................................................................................ 2.2 Non-Port Pins ........................................................................................................................ 2.3 Pin I/O Circuits and Recommended Connection of Unused Pins .................................... 11 3. ELECTRICAL SPECIFICATIONS .................................................................................................... 14 4. PACKAGE DRAWING ..................................................................................................................... 36 5. ...

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DIFFERENCES AMONG PRODUCTS Item PD703003 PD703003A PD703004A PD703025A PD70F3003 Internal ROM Mask ROM 128 KB Internal RAM 4 KB Operation Normal Single-chip Implemented mode operation mode mode ROM-less Implemented Not implemented mode Flash memory Not implemented programming mode V ...

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PIN FUNCTIONS 2.1 Port Pins Pin Name I/O P00 I/O Port 0 8-bit I/O port P01 Input/output can be specified in 1-bit units. P02 P03 P04 P05 P06 P07 P10 I/O Port 1 8-bit I/O port P11 Input/output can ...

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Pin Name I/O P60 to P63 I/O Port 6 4-bit I/O port Input/output can be specified in 1-bit units. P70 to P77 Input Port 7 8-bit input port P90 I/O Port 9 7-bit I/O port P91 Input/output can be specified ...

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Non-Port Pins Pin Name I/O TO110 Output Pulse signal output from timers TO111 TO120 TO121 TO130 TO131 TO140 TO141 TCLR11 Input External clear signal input for timers TCLR12 TCLR13 TCLR14 TI11 Input External ...

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Pin Name I/O SCK0 I/O Serial clock I/O (3-wire) for CSI0 to CSI3 SCK1 SCK2 SCK3 TXD0 Output Serial transmit data output for UART0 and UART1 TXD1 RXD0 Input Serial receive data input for UART0 and UART1 RXD1 PWM0 Output ...

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Pin I/O Circuits and Recommended Connection of Unused Pins The input/output circuit type of each pin and recommended connection of unused pins are shown in Table 2-1. Figure 2-1 illustrates the various circuit types using partially abridged diagrams. When ...

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Table 2-1. Types of Pin Input/Output Circuits (2/2) Pin Name Input/Output Circuit Type CLKOUT WAIT MODE RESET CV /CKSEL REF1 REF3 PD703003A, 703004A, 703025A Recommended Connection of Unused Pins ...

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Figure 2-1. Pin Input/Output Circuits Type P-ch IN N-ch Type 2 IN Schmitt-triggered input with hysteresis characteristics Type P-ch OUT N-ch Type Data P-ch Output N-ch disable Input enable PD703003A, 703004A, ...

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ELECTRICAL SPECIFICATIONS Absolute Maximum Ratings ( Parameter Symbol Power supply voltage Input voltage V I1 Clock input voltage V K Output current, low I OL ...

Page 15

Operating Conditions Operation Mode Direct mode, PLL mode Notes 1. When not using A/D converter 2. When using A/D converter Recommended Oscillator (1) Ceramic resonator connection (T (a) PD703003A, 703004A Manufacturer Part Number Oscillation Frequency f XX Kyocera KBR-5.0MSA/MSB Corporation ...

Page 16

PD703025A Manufacturer Part Number Oscillation Frequency f XX TDK CCR4.0MC3 CCR5.0MC3 Murata Mfg. CSA4.00MG040 Co., Ltd. CST4.00MGW040 CSTS0400MG06 CSA6.60MTZ040 CST6.60MTW040 CSTS0660MG06 Cautions 1. Put the oscillator as close to the X1 and X2 pins as possible not ...

Page 17

DC Characteristics (T = – Parameter Symbol Input voltage, high V IH Input voltage, low V IL Clock input voltage, high V XH Clock input voltage, low Schmitt-triggered input V T Threshold ...

Page 18

DC Characteristics (T = – Parameter Symbol Power PD703003A, When I DD1 supply 703004A operating current In I DD2 HALT mode In I DD3 IDLE mode In I DD4 STOP mode PD703025A When I DD1 ...

Page 19

Data Retention Characteristics (T = – Parameter Symbol Data retention voltage V DDDR Data retention current I DDDR Power supply voltage rise time t RVD Power supply voltage fall time t FVD Power supply voltage hold ...

Page 20

AC Characteristics (T = – test input waveform (a) P02/TCLR11, P03/TI11, P04/INTP110 to P07/INTP113, P12/TCLR12, P13/TI12, P14/INTP120, P15/INTP121/ SO2, P16/INTP122/SI2, P17/INTP123/SCK2, P23/RXD0/SI0, P24/SCK0, P26/RXD1/SI1, P27/SCK1, P32/ TCLR32, P33/TI13, P34/INTP130, P35/INTP131/SO3, P36/INTP132/SI3, P37/INTP133/SCK3, P112/TCLR14, P113/TI14, ...

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Clock timing Parameter Symbol X1 input cycle <1> t CYX X1 input high-level width <2> t WXH X1 input low-level width <3> t WXL X1 input rise time <4> input fall time <5> CPU ...

Page 22

Input waveform (a) P02/TCLR11, P03/TI11, P04/INTP110 to P07/INTP113, P12/TCLR12, P13/TI12, P14/INTP120, P15/ INTP121/SO2, P16/INTP122/SI2, P17/INTP123/SCK2, P23/RXD0/SI0, P24/SCK0, P26/RXD1/SI1, P27/ SCK1, P32/TCLR32, P33/TI13, P34/INTP130, P35/INTP131/SO3, P36/INTP132/SI3, P37/INTP133/ SCK3, P112/TCLR14, P113/TI14, P114/INTP140 to P117/INTP143, RESET, NMI, MODE Parameter Symbol Input rise ...

Page 23

Reset timing Parameter Symbol RESET high-level width <18> t WRSH RESET low-level width <19> t WRSL Remark T : Oscillation stabilization time OST RESET (input) PD703003A, 703004A, 703025A Conditions 25 MHz Version MIN. MAX. 500 When power supply is ...

Page 24

Read timing (1/2) Parameter Symbol Delay time from CLKOUT to address <20> t DKA Delay time from CLKOUT to R/W, UBEN, LBEN <78> t DKA2 Delay time from CLKOUT to address float <21> t FKA Delay time from CLKOUT ...

Page 25

Read timing (2/2): 1 wait T1 CLKOUT (output) <20> A16 to A19 (output) <78> R/W (output) UBEN (output) LBEN (output) AD0 to AD15 (I/ A15 (output) <22> <29> ASTB (output) <40> DSTB (output) WAIT (input) <41> Remark ...

Page 26

Write timing (1/2) Parameter Symbol Delay time from CLKOUT to address <20> t DKA Delay time from CLKOUT to R/W, UBEN, LBEN <78> t DKA2 Delay time from CLKOUT to ASTB <22> t DKST Delay time from CLKOUT to ...

Page 27

Write timing (2/2): 1 wait T1 CLKOUT (output) <20> A16 to A19 (output) <78> R/W (output) UBEN (output) LBEN (output) AD0 to AD15 (I/ A15 (output) <22> <29> ASTB (output) <40> DSTB (output) WAIT (input) <41> Remark ...

Page 28

Bus hold timing (1/2) Parameter Symbol HLDRQ setup time (to CLKOUT ) <54> t SHQK HLDRQ hold time (from CLKOUT ) <55> t HKHQ HLDAK delay time from CLKOUT <56> t DKHA HLDRQ high-level width <57> t WHQH HLDAK ...

Page 29

Bus hold timing (2/2) CLKOUT (output) <54> <55> HLDRQ (input) <61> HLDAK (output) A16 to A19 (output), Note D0 to D15 AD0 to AD15 (I/O) (input or output) ASTB (output) DSTB (output) R/W (output) Note UBEN (output), LBEN (output) ...

Page 30

Interrupt timing Parameter Symbol NMI high-level width <63> t WNIH NMI low-level width <64> t WNIL INTPn high-level width <65> t WITH INTPn low-level width <66> t WITL Remark CYK NMI (input) INTPn (input) Remark n ...

Page 31

CSI timing (1/2) (a) Master mode (i) Timing of CSI0 to CSI2 Parameter Symbol SCKn cycle <67> t CYSK1 SCKn high-level width <68> t WSKH1 SCKn low-level width <69> t WSKL1 SIn setup time (to SCKn ) <70> t ...

Page 32

CSI timing (2/2) (ii) Timing of CSI3 Parameter Symbol SCK3 cycle <67> t CYSK4 SCK3 high-level width <68> t WSKH4 SCK3 low-level width <69> t WSKL4 SI3 setup time (to SCK3 ) <70> t SSISK4 SI3 hold time (from ...

Page 33

RPU timing Parameter Symbol TI1n high-level width <74> t WTIH TI1n low-level width <75> t WTIL TCLR1n high-level width <76> t WTCH TCLR1n low-level width <77> t WTCL Remark CYK TI1n (input) TCLR1n (input) Remark n ...

Page 34

A/D Converter Characteristics (T = – Parameter Symbol Resolution — Note 1 Overall error — 4 — 3 Quantization error — Conversion time t 4 CONV 3 ...

Page 35

D/A Converter Characteristics (T = – Parameter Symbol Conditions Resolution — Overall error — Load condition REF2 REF3 — Load condition ...

Page 36

PACKAGE DRAWING 100-PIN PLASTIC LQFP (FINE PITCH) (14x14 100 NOTE Each lead centerline is located within 0. its true position (T.P.) at maximum material condition. 36 PD703003A, 703004A, 703025A A ...

Page 37

RECOMMENDED SOLDERING CONDITIONS The PD703003A, 703004A, and 703025A should be soldered and mounted under the following recommended conditions. For the details of the recommended soldering conditions, refer to the document Semiconductor Device Mounting Technology Manual (C10535E). For soldering methods ...

Page 38

NOTES FOR CMOS DEVICES 1 PRECAUTION AGAINST ESD FOR SEMICONDUCTORS Note: Strong electric field, when exposed to a MOS device, can cause destruction of the gate oxide and ultimately degrade the device operation. Steps must be taken to stop generation ...

Page 39

Regional Information Some information contained in this document may vary from country to country. Before using any NEC product in your application, please contact the NEC office in your country to obtain a list of authorized representatives and distributors. They ...

Page 40

The export of this product from Japan is regulated by the Japanese government. To export this product may be prohibited without governmental license, the need for which must be judged by the customer. The export or re-export of this product ...

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