DS96-L147-203 CONEXANT [Conexant Systems, Inc], DS96-L147-203 Datasheet - Page 87

• Manufacturer Part Number: DS96-L147-203
• Description: SmartV.XX Modem
• Manufacturer: CONEXANT [Conexant Systems, Inc]

5.2.5
5.2.6
102199B
MCR - Modem Control Register (Addr = 4)
LSR - Line Status Register (Addr = 5)
The Modem Control Register (MCR) controls the interface with the modem or data set.
Bit 7-5
Bit 4
Data written to the Transmit Buffer is looped back to the Receiver Buffer.
The DTS (MCR0), RTS (MCR1), Out1 (MCR2), and Out2 (MCR3) modem control
register bits are internally connected to the DSR (MSR5), CTS (MSR4), RI (MSR6), and
DCD (MSR7) modem status register bits, respectively.
Bit 3
Bit 2
Bit 1
Bit 0
This 8-bit register provides status information to the host concerning data transfer.
Bit 7
Bit 6
Always 0.
When this bit is set to a 1, the diagnostic mode is selected and the following occurs:
When this bit is a 1, HINT is enabled. When this bit is a 0, HINT is in the high
This bit is used in local loopback (see MCR4).
This bit controls the Request to Send (RTS) function. When this bit is a 1, RTS is on.
This bit controls the Data Terminal Ready (DTR) function. When this bit is a 1, DTR is
In the 16450 mode, this bit is not used and is always 0.
In the FIFO mode, this bit is set if there are one or more characters in the RX FIFO
This bit is set to a 1 whenever the TX Buffer (THR) and equivalent of the Transmitter
In the FIFO mode, this bit is set to a 1 when ever the TX FIFO and the equivalent of
impedance state.
When this bit is a 0, RTS is off.
on. When this bit is a 0, DTR is off.
with a parity error, framing error, or break indication detected. This bit is reset to a 0
when the host reads the LSR and none of the above conditions exist in the RX FIFO.
Shift Register (TSR) are both empty. It is reset to a 0 whenever either the THR or the
equivalent of the TSR contains a character.
the TSR are both empty.
CX81801-7x/8x SmartV.XX Modem Data Sheet
Not used.
Local Loopback.
Output 2.
Output 1.
Request to Send (RTS).
Data Terminal Ready (DTR).
RX FIFO Error.
Transmitter Empty (TEMT).
Conexant
5-7