ak8823 AKM Semiconductor, Inc., ak8823 Datasheet - Page 19

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ak8823

Manufacturer Part Number
ak8823
Description
Hdtv & Ntsc/pal Multi-format Encoder Sdtv/hdtv X2 Oversampling 5ch Dacs
Manufacturer
AKM Semiconductor, Inc.
Datasheet
ASAHI KASEI
[AK8823]
When to change mode by register setting
When a mode change is made, involving( accompanied with ) PLL oscillator frequency change, following timing sequence
should be met.
A longer than 2 msec transition time is required from sequence <3> to sequence <4> below.
<1> DAC off
<2> PLL operation off ( PLL_SPD_N : 0 )
initialization of internal filter ( INIT_N pin “ L “ or SD_SRST_N / HD_SRST_N : 0 )
mode change setting ( D1 to D3 change, CLK_HD frequency is also changed during this period )
<3> start PLL operation ( PLL_SPD_N : 1 )
<4> release of internal filter initialization ( INIT_N pin “ H “ or SD_SRST_N / HD_SRST_N : 1 )
DAC on
When a Video Mute Circuit etc is externally equipped and used, DAC manipulation of sequences <1> and <4> above can be
eliminated.
It is also true that its manipulation can be eliminated when the internal filter initialization register is always used in operating
condition “ 1 “.
DVDD / AVDD / IVDD
POWER UP
2msec
PD_N
Clock On
CLK_SD / CLK_HD
*PLL_SPD_N
INIT_N
*SD_SRST_N
*HD_SRST_N
*DAC on/off
<1> <2>
<3> <4>
Register setting via I2C interface ( all other register change )
Access to the AK8823 registers is possible even when CLK_SD or CLK_HD clocks are not fed.
The AK8823 register manipulation can be made anytime, but care must be taken when the power is up or when the internal PLL
oscillating frequency is changed or when the input clock is changed.
In Macrovision setting mode and VBID setting mode where changes of PLL oscillating frequency are not involved, target
registers can be directly accessed.
MS0549-E-02
19
2006/10

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