ak8823 AKM Semiconductor, Inc., ak8823 Datasheet - Page 7

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ak8823

Manufacturer Part Number
ak8823
Description
Hdtv & Ntsc/pal Multi-format Encoder Sdtv/hdtv X2 Oversampling 5ch Dacs
Manufacturer
AKM Semiconductor, Inc.
Datasheet
ASAHI KASEI
( 5 ) I2C Timing
( 5-1 ) Timing 1
No external clock is required to write into / read from registers via I2C interface.
Each operation completes with SCL clock only.
However, a 27MHz clock is required to enable SD block when to access such registers in SD block as VBID / CC / WSS
( Addresses 0x18,0x19, 0x26 ~ 0x2B ) and Status ( at 0x34 ).
When a 27 MHz clock is stopped once and when to access those registers again, it should be executed after waiting 2 Frame
time after the recovery of clock.
MS0549-E-02
SDA
The above I2C Bus related timings are I2C Bus specifications, and they are not the device limits.
For details, refer to I2C Bus Specifications.
( 5-1 ) Timing 2
note 1 : when to use in I2C Bus Standard mode, tSU : DAT > = 250nsec must be satisfied.
note 2 : when the AK8823 is used on the not-extended tLOW Bus ( used at tLOW = minimum specification ), this condition
must be satisfied.
SCL
Bus Free Time
Hold Time (Start Condition)
Clock Pulse Low Time
Input Signal Rise Time
Input Signal Fall Time
Setup Time(Start Condition)
Setup Time(Stop Condition)
Data Setup Time
Data Hold Time
Clock Pulse High Time
SDA
SCL
Parameter
Parameter
tBUF
tHIGH
tHD:STA
tF
tLOW
tSU:STO
tHD:DAT
tHD:DAT
tHD:STA
tSU:STA
tSU:DAT
Symbol
Symbol
tHIGH
tLOW
tBUF
tR
tF
tR
tR
100 (note1)
Min.
0.0
0.6
Min.
7
1.3
1.3
0.6
0.6
0.6
tSU:DAT
0.9 (note2)
Max.
tSU:STA
Max.
300
300
tF
usec
usec
usec
nsec
nsec
usec
usec
nsec
usec
usec
Unit
Unit
tSU:STO
[AK8823]
2006/10

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