DS1877T+TR MAXIM [Maxim Integrated Products], DS1877T+TR Datasheet - Page 57

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DS1877T+TR

Manufacturer Part Number
DS1877T+TR
Description
SFP Controller for Dual Rx Interface
Manufacturer
MAXIM [Maxim Integrated Products]
Datasheet
Table 02h, Register C0h: PW_ENA
C0h
FACTORY DEFAULT
READ ACCESS
WRITE ACCESS
A2h AND B2h MEMORY
MEMORY TYPE
RESERVED
BIT 7
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
RESERVED
RWTBL1C: Table 01h or 05h bytes F8h–FFh. Table address is dependent on MASK bit (Table
02h, Register 88h).
0 = (default) Read and write access for PW2 only.
1 = Read and write access for both PW1 and PW2.
RWTBL2: Table 02h. Writing a nonvolatile value to this bit requires PW2 access.
0 = (default) Read and write access for PW2 only.
1 = Read and write access for both PW1 and PW2.
RWTBL1A: Table 01h, Registers 80h–BFh.
0 = Read and write access for PW2 only.
1 = (default) Read and write access for both PW1 and PW2.
RWTBL1B: Table 01h, Registers C0h–F7h.
0 = (default) Read and write access for PW2 only.
1 = Read and write access for both PW1 and PW2.
WLOWER: Bytes 00h–5Fh in main memory. All users can read this area.
0 = (default) Write access for PW2 only.
1 = Write access for both PW1 and PW2.
WAUXA: Auxiliary memory, Registers 00h–7Fh. All users can read this area.
0 = (default) Write access for PW2 only.
1 = Write access for both PW1 and PW2.
WAUXB: Auxiliary memory, Registers 80h–FFh. All users can read this area.
0 = (default) Write access for PW2 only.
1 = Write access for both PW1 and PW2.
RWTBL1C
SFP Controller for Dual Rx Interface
10h
PW2 or (PW1 and RWTBL2) or (PW1 and RTBL2)
PW2 or (PW1 and RWTBL2)
Common A2h and B2h memory locations
Nonvolatile (SEE)
RWTBL2
RWTBL1A
RWTBL1B
WLOWER
WAUXA
WAUXB
BIT 0
57

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