ex256-ptqg100i Actel Corporation, ex256-ptqg100i Datasheet - Page 21

• Manufacturer Part Number: ex256-ptqg100i
• Description: Fpga Ex Family 4k Gates 256 Cells 250mhz 0.22um Cmos Technology 2.5v 100-pin Tqfp
• Manufacturer: Actel Corporation

eX Timing Model
Note: *Values shown for eX128, worst-case automotive conditions (2.3 V V
Figure 1-15 • eX Timing Model
Hardwired Clock
External Setup =
Clock-to-Out (Pad-to-Pad), typical
Hardwired
Routed
Clock
Clock
=
=
=
I/O Module
I/O Module
t
t
t
1.3 + 0.5 + 0.8 – 1.8 = 0.8 ns
t
1.8 + 1.0 + 0.6 + 4.9 = 8.3 ns
Input Delays
INYH
INYH
INYH
HCKH
t
HCKH
t
RCKH
(100% Load)
= 1.3 ns
= 1.3 ns
+ t
+ t
= 1.8 ns
= 2.3 ns
IRD1
RCO
+ t
+ t
SUD
RD1
t
t
t
t
t
IRD1
IRD2
IRD1
t
t
SUD
HD
SUD
HD
– t
+ t
= 0.0 ns
= 0.0 ns
= 0.5 ns
= 0.7 ns
= 0.5 ns
= 0.8 ns
HCKH
= 0.8 ns
DHL
t
t
Register
Register
RCO
RCO
D
D
Cell
Cell
Internal Delays
Combinatorial
t
= 1.0 ns
= 1.0 ns
PD
v3.2
Cell
Q
Q
= 1.1 ns
Routed Clock
External Setup =
Clock-to-Out (Pad-to-Pad), typical
t
t
RD1
RD1
CCA
= 0.6 ns
= 0.6 ns
, 3.3 V V
t
t
t
RD1
RD4
RD8
Predicted
Routing
Delays
CCI
= 0.6 ns
= 1.1 ns
= 1.9 ns
=
=
=
, 35 pF Pad Load).
I/O Module
t
1.3 + 0.7 + 0.8 – 2.3 = 0.5 ns
t
2.3 + 1.0 + 0.6 + 4.9 = 8.8 ns
I/O Module
t
t
INYH
RCKH
DHL
DHL
I/O Module
t
= 4.9 ns
t
= 4.9 ns
ENZL
ENZL
+ t
+ t
Output Delays
eX Automotive Family FPGAs
IRD2
RCO
= 4.0 ns
= 4.0 ns
t
DHL
+ t
+ t
= 4.9 ns
SUD
RD1
– t
+ t
RCKH
DHL
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