ssd1329 ETC-unknow, ssd1329 Datasheet - Page 36

• Manufacturer Part Number: ssd1329
• Description: 128 X 128 Oled Segment / Common Driver With Controller Equips With 16 Gray Scale Levels And 64 Hard Icon Lines
• Manufacturer: ETC-unknow

10.7 Set Individual Icon Current (92h)
This double byte command is used to fine tune the current for each of the 64 icons. Command 92h followed
by 64 single byte data. These 64 byte data have to be entered in order to make this command function. Below
is the formula for calculating the icon current. Please also refer to Table 9-1 for detail information and
breakdown levels of each step.
Icon Current = Single byte value / 127 x Maximum icon current set with command 91h.
10.8 Set Individual Icon ON / OFF Registers (93h)
This double byte command is used to select one of the 64 icons and choose the ON, OFF or blinking
condition of the selected icon.
10.9 Set Icon ON / OFF Registers (94h)
This double byte command is used to set the ON / OFF status of all 64 icons.
10.10 Set Icon Blinking Cycle (95h)
This double byte command is used to set icon oscillator frequency and blinking cycle selected with above
command 93h. Please refer to Table 9-1 for detail information and breakdown levels of each step.
10.11 Set Icon Duty (96h)
This double byte command is used to set the icon frame frequency and icon AC drive duty ratio. Please refer
to Table 9-1 for detail information and breakdown levels of each step.
10.12 Set Re-Map(A0h)
This double command has multiple configurations and each bit setting is described as follows:
Solomon Systech
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Column Address Remapping (A[0])
This bit is made for increase the flexibility layout of segment signals in OLED module with segment
arranged from left to right (when A[0] is set to 0) or from right to left (when A[0] is set to 1).
Nibble Remapping (A[1])
When A[1] is set to 1, the two nibbles of the data bus for RAM access are re-mapped, such that
(D7, D6, D5, D4, D3, D2, D1, D0) acts like (D3, D2, D1, D0, D7, D6, D5, D4)
If this feature works together with Column Address Re-map, it would produce an effect of flipping
the outputs from SEG0~127 to SEG127~SEG0 as show in Table 8-7.
Address increment mode (A[2])
When A[2] is set to 0, the driver is set as horizontal address increment mode. After the display RAM
is read/written, the column address pointer is increased automatically by 1. If the column address
pointer reaches column end address, the column address pointer is reset to column start address and
row address pointer is increased by 1. The sequence of movement of the row and column address
point for horizontal address increment mode is shown in Figure 10-4.
Dec 2005 P 36/58
Rev 1.1
SSD1329