A25L05P AMICC [AMIC Technology], A25L05P Datasheet - Page 20

no-image

A25L05P

Manufacturer Part Number
A25L05P
Description
2Mbit / 1Mbit / 512Kbit, Low Voltage, Serial Flash Memory With 85MHz SPI Bus Interface
Manufacturer
AMICC [AMIC Technology]
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
A25L05P
Manufacturer:
AMIC
Quantity:
18 000
Fast Read Dual Input-Output (BBh)
The Fast Read Dual Input-Output (BBh) instruction is similar
to the Fast_Read (0Bh) instruction except the data is input
and output on two pins, DO and DIO, instead of just DO. This
allows
A25L20P/A25L10P/A25L05P at twice the rate of standard
SPI devices.
Similar to the Fast Read instruction, the Fast Read Dual
Output instruction can operate at the highest possible
Figure 11. FAST_READ_DUAL_INPUT-OUTPUT Instruction Sequence and Data-Out Sequence
(August, 2007, Version 1.0)
data
DIO
DIO
DO
DO
S
S
C
C
to
Note: Address bits A23 to A18 are Don’t Care, for A25L20P.
20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35
3 2 1 0
High Impedance
Dummy
be
0 1
Address bits A23 to A17 are Don’t Care, for A25L10P.
Address bits A23 to A16 are Don’t Care, for A25L05P
Byte
transferred
2 3 4
Instruction
7 5 3 1
6 4 2 0
MSB
DIO switches from input to output
Data Out 1
5 6
from
7
MSB
6 4 2 0 6 4 2 0 6 4 2 0 6 4 2 0
7 5 3 1 7 5 3
MSB
22 20 18
23
8
Data Out 2
21 19
the
9
24-Bit Address
10
19
frequency
accomplished by adding four “dummy” clocks after the 24-bit
address as shown in figure 11. The dummy clocks allow the
device’s internal circuits additional time for setting up the
initial address. The input data during the dummy clocks is
“don’t care”. However, the DIO and DO pins should be
high-impedance prior to the falling edge of the first data out
clock.
6 4 2
7
16 17 18 19
Data Out 3
A25L20P/A25L10P/A25L05P Series
5 3
1
of
0
0
1
MSB
7 5 3 1 7 5 3 1
Data Out 4
f
C
(See
AMIC Technology Corp.
AC
Data Out 5
Characteristics).
MSB
7
This
is

Related parts for A25L05P