74AUP1G86GF,132 NXP Semiconductors, 74AUP1G86GF,132 Datasheet - Page 10
![IC GATE EXCLUSIVE-OR 2-IN 6-XSON](/photos/1/39/13915/6-xson_sot886_pkg_sml.jpg)
74AUP1G86GF,132
Manufacturer Part Number
74AUP1G86GF,132
Description
IC GATE EXCLUSIVE-OR 2-IN 6-XSON
Manufacturer
NXP Semiconductors
Series
74AUPr
Datasheet
1.74AUP1G86GF132.pdf
(20 pages)
Specifications of 74AUP1G86GF,132
Number Of Circuits
1
Package / Case
6-XSON, SOT891
Logic Type
XOR (Exclusive OR)
Number Of Inputs
2
Current - Output High, Low
4mA, 4mA
Voltage - Supply
0.8 V ~ 3.6 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Logic Family
AUP
High Level Output Current
- 4 mA
Low Level Output Current
4 mA
Propagation Delay Time
21.5 ns
Supply Voltage (max)
3.6 V
Supply Voltage (min)
0.8 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
74AUP1G86GF-H
74AUP1G86GF-H
935281119132
74AUP1G86GF-H
935281119132
NXP Semiconductors
Table 9.
Voltages are referenced to GND (ground = 0 V); for test circuit see
[1]
12. Waveforms
Table 10.
74AUP1G86
Product data sheet
Symbol
C
t
C
t
Supply voltage
V
0.8 V to 3.6 V
pd
pd
Fig 7.
CC
L
L
= 15 pF
= 30 pF
t
pd
is the same as t
Measurement points are given in
Logic levels: V
The data input (A or B) to output (Y) propagation delays
Dynamic characteristics
Measurement points
Parameter
propagation delay
propagation delay
PZL
OL
and t
and V
PLZ
Output
V
0.5 × V
OH
.
M
are typical output voltage drop that occur with the output load.
Conditions
A or B to Y; see
A or B to Y; see
V
V
V
V
V
V
V
V
V
V
A, B input
Y output
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
…continued
Table
= 1.1 V to 1.3 V
= 1.4 V to 1.6 V
= 1.65 V to 1.95 V
= 2.3 V to 2.7 V
= 3.0 V to 3.6 V
= 1.1 V to 1.3 V
= 1.4 V to 1.6 V
= 1.65 V to 1.95 V
= 2.3 V to 2.7 V
= 3.0 V to 3.6 V
All information provided in this document is subject to legal disclaimers.
GND
V
V
10.
OH
OL
V
I
Rev. 3 — 5 October 2010
Figure 7
Figure 7
Input
V
0.5 × V
M
V
M
V
CC
M
t
PHL
[1]
[1]
Figure 8
−40 °C to +85 °C
Min
2.7
2.2
3.5
2.8
2.2
1.9
1.6
1.5
2.5
2.1
Low-power 2-input EXCLUSIVE-OR gate
V
V
I
CC
mna615
t
Max
18.1
24.1
14.8
11.3
11.7
PLH
9.0
7.0
6.4
9.1
8.3
−40 °C to +125 °C
Min
74AUP1G86
2.7
2.2
1.9
1.6
1.5
3.5
2.8
2.5
2.2
2.1
t
≤ 3.0 ns
r
= t
© NXP B.V. 2010. All rights reserved.
f
Max
20.0
12.5
26.6
16.3
12.9
10.1
9.9
7.7
7.1
9.2
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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