74HC3G14DP,125 NXP Semiconductors, 74HC3G14DP,125 Datasheet

IC INV SCHMITT-TRIGGER 8-TSSOP

74HC3G14DP,125

Manufacturer Part Number
74HC3G14DP,125
Description
IC INV SCHMITT-TRIGGER 8-TSSOP
Manufacturer
NXP Semiconductors
Series
74HCr
Datasheet

Specifications of 74HC3G14DP,125

Number Of Circuits
3
Logic Type
Inverter with Schmitt Trigger
Package / Case
8-TSSOP
Number Of Inputs
1
Current - Output High, Low
5.2mA, 5.2mA
Voltage - Supply
2 V ~ 6 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Logic Family
74HC
High Level Output Current
- 5.2 mA
Low Level Output Current
5.2 mA
Propagation Delay Time
125 ns, 25 ns, 21 ns
Supply Voltage (max)
6 V
Supply Voltage (min)
2 V
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Operating Supply Voltage
5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
74HC3G14DP-G
74HC3G14DP-G
935272126125

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
74HC3G14DP,125
Manufacturer:
NXP/恩智浦
Quantity:
20 000
1. General description
2. Features
3. Applications
4. Ordering information
Table 1.
Type number
74HC3G14DP
74HCT3G14DP
74HC3G14DC
74HCT3G14DC
74HC3G14GD
74HCT3G14GD
Ordering information
Package
Temperature range Name
40 C to +125 C
40 C to +125 C
40 C to +125 C
The 74HC3G14; 74HCT3G14 is a high-speed Si-gate CMOS device.
The 74HC3G14; 74HCT3G14 provides three inverting buffers with Schmitt trigger inputs
which accept standard input signals. They are capable of transforming slowly changing
input signals into sharply defined, jitter-free output signals.
I
I
I
I
I
I
I
I
I
I
I
74HC3G14; 74HCT3G14
Triple inverting Schmitt trigger
Rev. 03 — 8 May 2009
Wide supply voltage range from 2.0 V to 6.0 V
High noise immunity
Low power dissipation
Balanced propagation delays
Unlimited input rise and fall times
Multiple package options
ESD protection:
Specified from 40 C to +85 C and 40 C to +125 C
Wave and pulse shaper for highly noisy environments
Astable multivibrators
Monostable multivibrators
N
N
HBM JESD22-A114E exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
TSSOP8
VSSOP8
XSON8U
Description
plastic thin shrink small outline package; 8 leads;
body width 3 mm; lead length 0.5 mm
plastic very thin shrink small outline package; 8 leads;
body width 2.3 mm
plastic extremely thin small outline package; no leads;
8 terminals; UTLP based; body 3
2
0.5 mm
Product data sheet
Version
SOT505-2
SOT765-1
SOT996-2

Related parts for 74HC3G14DP,125

74HC3G14DP,125 Summary of contents

Page 1

Triple inverting Schmitt trigger Rev. 03 — 8 May 2009 1. General description The 74HC3G14; 74HCT3G14 is a high-speed Si-gate CMOS device. The 74HC3G14; 74HCT3G14 provides three inverting buffers with Schmitt trigger inputs which accept standard input signals. ...

Page 2

... NXP Semiconductors 5. Marking Table 2. Marking Type number 74HC3G14DP 74HCT3G14DP 74HC3G14DC 74HCT3G14DC 74HC3G14GD 74HCT3G14GD 6. Functional diagram 001aah728 Fig 1. Logic symbol 7. Pinning information 7.1 Pinning 74HC3G14 74HCT3G14 GND 4 001aak035 Fig 4. Pin configuration SOT505-2 (TSSOP8) and SOT765-1 (VSSOP8) 74HC_HCT3G14_3 Product data sheet 74HC3G14; 74HCT3G14 ...

Page 3

... NXP Semiconductors 7.2 Pin description Table 3. Pin description Symbol Pin 1A, 2A GND 4 1Y, 2Y Functional description [1] Table 4. Function table Input [ HIGH voltage level LOW voltage level. 9. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). ...

Page 4

... NXP Semiconductors 10. Recommended operating conditions Table 6. Recommended operating conditions Voltages are referenced to GND (ground = 0 V). Symbol Parameter V supply voltage CC V input voltage I V output voltage O T ambient temperature amb 11. Static characteristics Table 7. Static characteristics Voltages are referenced to GND (ground = 0 V). All typical values are measured at T ...

Page 5

... NXP Semiconductors Table 7. Static characteristics Voltages are referenced to GND (ground = 0 V). All typical values are measured at T Symbol Parameter Conditions I supply current per input pin additional per input; CC supply current input I capacitance Table 8. Transfer characteristics Voltages are referenced to GND (ground = 0 V); for test circuit see ...

Page 6

... NXP Semiconductors 11.1 Waveforms transfer characteristics Fig 6. Transfer characteristic 2 (mA Fig 8. Typical 74HCT3G14 transfer characteristics 74HC_HCT3G14_3 Product data sheet 74HC3G14; 74HCT3G14 mna207 Fig 7. Definition of V mna031 3 (mA) 2.0 1 Rev. 03 — 8 May 2009 Triple inverting Schmitt trigger V T+ ...

Page 7

... NXP Semiconductors 100 Fig 9. Typical 74HC3G14 transfer characteristics 74HC_HCT3G14_3 Product data sheet 74HC3G14; 74HCT3G14 mna028 1 (mA) 0.8 0.6 0.4 0.2 2 (mA) 0 3.0 V Rev. 03 — 8 May 2009 Triple inverting Schmitt trigger 0 0 2 mna030 6.0 (V) I © NXP B.V. 2009. All rights reserved. ...

Page 8

... NXP Semiconductors 12. Dynamic characteristics Table 9. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); for test circuit see Symbol Parameter 74HC3G14 t propagation delay pd t transition time t C power dissipation PD capacitance 74HCT3G14 t propagation delay pd t transition time t C power dissipation PD capacitance [ the same as t ...

Page 9

... NXP Semiconductors 13. Waveforms Measurement points are given in V and V are typical voltage output levels that occur with the output load Fig 10. The data input (nA) to output (nY) propagation delays and output transition times Table 10. Measurement points Type 74HC3G14 74HCT3G14 74HC_HCT3G14_3 Product data sheet 74HC3G14 ...

Page 10

... NXP Semiconductors negative positive Test data is given in Table Definitions for test circuit Termination resistance should be equal to output impedance Load capacitance including jig and probe capacitance Load resistance Test selection switch. Fig 11. Test circuit for measuring switching times Table 11. Test data Type ...

Page 11

... NXP Semiconductors 14. Application information The slow input rise and fall times cause additional power dissipation, which can be calculated using the following formula add additional power dissipation ( W); add f = input frequency (MHz input rise time (ns input fall time (ns CC(AV) I CC(AV) Figure 13. An example of a relaxation circuit using the 74HC3G14/74HCT3G14 is shown ...

Page 12

... NXP Semiconductors linear change of V between 0.1V I Fig 13 function of V CC(AV For 74HC3G14 For 74HCT3G14: T Fig 14. Relaxation oscillator 74HC_HCT3G14_3 Product data sheet 74HC3G14; 74HCT3G14 200 I CC(AV 150 positive-going 100 0. for 74HCT3G14 mna035 1 --------------------- - 0 ------------------------ - 0.67 RC Rev. 03 — 8 May 2009 Triple inverting Schmitt trigger ...

Page 13

... NXP Semiconductors 15. Package outline TSSOP8: plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0 pin 1 index 1 e DIMENSIONS (mm are the original dimensions UNIT max. 0.15 0.95 mm 1.1 0.25 0.00 0.75 Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. ...

Page 14

... NXP Semiconductors VSSOP8: plastic very thin shrink small outline package; 8 leads; body width 2 pin 1 index 1 e DIMENSIONS (mm are the original dimensions UNIT max. 0.15 0. 0.12 0.00 0.60 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic or metal protrusions of 0.25 mm maximum per side are not included. ...

Page 15

... NXP Semiconductors XSON8U: plastic extremely thin small outline package; no leads; 8 terminals; UTLP based; body 0.5 mm terminal 1 index area DIMENSIONS (mm are the original dimensions) A UNIT max 0.05 0.35 2.1 mm 0.5 0.00 0.15 1.9 OUTLINE VERSION IEC SOT996 Fig 17. Package outline SOT996-2 (XSON8U) ...

Page 16

... Modifications: The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. • Legal texts have been adapted to the new company name where appropriate. • Added type number 74HC3G14GD and 74HCT3G14GD (XSON8U package) ...

Page 17

... Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice ...

Page 18

... NXP Semiconductors 20. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 4 Ordering information . . . . . . . . . . . . . . . . . . . . . 1 5 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 6 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 7 Pinning information . . . . . . . . . . . . . . . . . . . . . . 2 7.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 7.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 8 Functional description . . . . . . . . . . . . . . . . . . . 3 9 Limiting values Recommended operating conditions Static characteristics 11.1 Waveforms transfer characteristics Dynamic characteristics . . . . . . . . . . . . . . . . . . 8 13 Waveforms ...

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