74HCT2G86DC,125 NXP Semiconductors, 74HCT2G86DC,125 Datasheet

IC DUAL 2IN EXCLU_OR GATE 8VSSOP

74HCT2G86DC,125

Manufacturer Part Number
74HCT2G86DC,125
Description
IC DUAL 2IN EXCLU_OR GATE 8VSSOP
Manufacturer
NXP Semiconductors
Series
74HCTr
Datasheet

Specifications of 74HCT2G86DC,125

Logic Type
XOR (Exclusive OR)
Number Of Inputs
2
Number Of Circuits
2
Current - Output High, Low
4mA, 4mA
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
US8, 8-VSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
74HCT2G86DC-G
74HCT2G86DC-G
935274826125
1. General description
2. Features
3. Ordering information
Table 1.
Type number
74HC2G86DP
74HCT2G86DP
74HC2G86DC
74HCT2G86DC
74HC2G86GD
74HCT2G86GD
Ordering information
Package
Temperature range Name
40 C to +125 C
40 C to +125 C
40 C to +125 C
The 74HC2G86 and 74HCT2G86 are high-speed Si-gate CMOS devices. They provide
two 2-input exclusive-OR gates.
The HC device has CMOS input switching levels and supply voltage range 2 V to 6 V.
The HCT device has TTL input switching levels and supply voltage range 4.5 V to 5.5 V.
I
I
I
I
I
I
I
I
74HC2G86; 74HCT2G86
Dual 2-input exclusive-OR gate
Rev. 03 — 7 May 2009
Wide supply voltage range from 2.0 V to 6.0 V
Symmetrical output impedance
High noise immunity
Low power dissipation
Balanced propagation delays
Multiple package options
ESD protection:
Specified from 40 C to +85 C and 40 C to +125 C
N
N
HBM JESD22-A114E exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
TSSOP8
VSSOP8
XSON8U
Description
plastic thin shrink small outline package; 8 leads;
body width 3 mm; lead length 0.5 mm
plastic very thin shrink small outline package; 8 leads;
body width 2.3 mm
plastic extremely thin small outline package; no leads;
8 terminals; UTLP based; body 3
2
0.5 mm
Product data sheet
Version
SOT505-2
SOT765-1
SOT996-2

Related parts for 74HCT2G86DC,125

74HCT2G86DC,125 Summary of contents

Page 1

Dual 2-input exclusive-OR gate Rev. 03 — 7 May 2009 1. General description The 74HC2G86 and 74HCT2G86 are high-speed Si-gate CMOS devices. They provide two 2-input exclusive-OR gates. The HC device has CMOS input switching levels and supply ...

Page 2

... NXP Semiconductors 4. Marking Table 2. Marking code Type number 74HC2G86DP 74HCT2G86DP 74HC2G86DC 74HCT2G86DC 74HC2G86GD 74HCT2G86GD 5. Functional diagram 001aah760 Fig 1. Logic symbol Fig 3. Logic diagram (one gate) 74HC_HCT2G86_3 Product data sheet 74HC2G86; 74HCT2G86 Marking code H86 T86 H86 T86 H86 T86 1Y 2Y Fig 2. ...

Page 3

... NXP Semiconductors 6. Pinning information 6.1 Pinning 74HC2G86 74HCT2G86 GND 4 001aak026 Fig 4. Pin configuration SOT505-2 (TSSOP8) and SOT765-1 (VSSOP8) 6.2 Pin description Table 3. Pin description Symbol Pin 1A 1B GND 4 1Y Functional description [1] Table 4. Function table Input [ HIGH voltage level LOW voltage level. ...

Page 4

... NXP Semiconductors 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter V supply voltage CC I input clamping current IK I output clamping current OK I output current O I supply current CC I ground current ...

Page 5

... NXP Semiconductors Table 7. Static characteristics Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions V LOW-level input voltage HIGH-level output voltage 4.0 mA 5.2 mA LOW-level output voltage 4.0 mA 5.2 mA input leakage current supply current 6 input I capacitance 74HCT2G86 V HIGH-level 5.5 V ...

Page 6

... NXP Semiconductors 11. Dynamic characteristics Table 8. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); for test circuit see Symbol Parameter Conditions 74HC2G86 t propagation nA nY; see pd delay transition nY; see Figure 6 t time power per buffer; PD dissipation pF capacitance V = GND 74HCT2G86 ...

Page 7

... NXP Semiconductors 12. Waveforms Measurement points are given in V and V are typical output voltage levels that occur with the output load Fig 6. Propagation delay data input (nA, nB) to data output (nY) and transition time output (nY) Table 9. Measurement points Type Input V M 74HC2G86 0.5V CC 74HCT2G86 1 ...

Page 8

... NXP Semiconductors negative positive Test data is given in Table Definitions for test circuit Termination resistance should be equal to output impedance Load capacitance including jig and probe capacitance Load resistance Test selection switch. Fig 7. Test circuit for measuring switching times Table 10. Test data Type ...

Page 9

... NXP Semiconductors 13. Package outline TSSOP8: plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0 pin 1 index 1 e DIMENSIONS (mm are the original dimensions UNIT max. 0.15 0.95 mm 1.1 0.25 0.00 0.75 Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. ...

Page 10

... NXP Semiconductors VSSOP8: plastic very thin shrink small outline package; 8 leads; body width 2 pin 1 index 1 e DIMENSIONS (mm are the original dimensions) A UNIT max. 0.15 0. 0.12 0.00 0.60 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic or metal protrusions of 0.25 mm maximum per side are not included. ...

Page 11

... NXP Semiconductors XSON8U: plastic extremely thin small outline package; no leads; 8 terminals; UTLP based; body 0.5 mm terminal 1 index area DIMENSIONS (mm are the original dimensions) A UNIT max 0.05 0.35 2.1 mm 0.5 0.00 0.15 1.9 OUTLINE VERSION IEC SOT996 Fig 10. Package outline SOT996-2 (XSON8U) ...

Page 12

... Modifications: The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. • Legal texts have been adapted to the new company name where appropriate. • Added type number 74HC2G86GD and 74HCT2G86GD (XSON8U package) ...

Page 13

... Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice ...

Page 14

... NXP Semiconductors 18. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 1 4 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 5 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 6 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 7 Functional description . . . . . . . . . . . . . . . . . . . 3 8 Limiting values Recommended operating conditions Static characteristics Dynamic characteristics . . . . . . . . . . . . . . . . . . 6 12 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 13 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9 14 Abbreviations ...

Related keywords