74AUP2G32GM,125 NXP Semiconductors, 74AUP2G32GM,125 Datasheet - Page 8

IC OR GATE DUAL 2-IN 8-XQFN

74AUP2G32GM,125

Manufacturer Part Number
74AUP2G32GM,125
Description
IC OR GATE DUAL 2-IN 8-XQFN
Manufacturer
NXP Semiconductors
Series
74AUPr
Datasheet

Specifications of 74AUP2G32GM,125

Number Of Circuits
2
Package / Case
8-XQFN
Logic Type
OR Gate
Number Of Inputs
2
Current - Output High, Low
4mA, 4mA
Voltage - Supply
0.8 V ~ 3.6 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Logic Family
AUP
High Level Output Current
- 4 mA
Low Level Output Current
4 mA
Propagation Delay Time
19.1 ns
Supply Voltage (max)
3.6 V
Supply Voltage (min)
0.8 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
74AUP2G32GM-G
74AUP2G32GM-G
935281426125

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
74AUP2G32GM,125
Manufacturer:
NEXPERIA/安世
Quantity:
20 000
NXP Semiconductors
11. Dynamic characteristics
Table 8.
Voltages are referenced to GND (ground = 0 V); for test circuit see
74AUP2G32
Product data sheet
Symbol Parameter
C
t
C
t
C
t
C
t
pd
pd
pd
pd
L
L
L
L
= 5 pF
= 10 pF
= 15 pF
= 30 pF
propagation delay
propagation delay
propagation delay
propagation delay
Dynamic characteristics
Conditions
nA or nB to nY; see
nA or nB to nY; see
nA or nB to nY; see
nA or nB to nY; see
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
= 0.8 V
= 1.1 V to 1.3 V
= 1.4 V to 1.6 V
= 1.65 V to 1.95 V
= 2.3 V to 2.7 V
= 3.0 V to 3.6 V
= 0.8 V
= 1.1 V to 1.3 V
= 1.4 V to 1.6 V
= 1.65 V to 1.95 V
= 2.3 V to 2.7 V
= 3.0 V to 3.6 V
= 0.8 V
= 1.1 V to 1.3 V
= 1.4 V to 1.6 V
= 1.65 V to 1.95 V
= 2.3 V to 2.7 V
= 3.0 V to 3.6 V
= 0.8 V
= 1.1 V to 1.3 V
= 1.4 V to 1.6 V
= 1.65 V to 1.95 V
= 2.3 V to 2.7 V
= 3.0 V to 3.6 V
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 21 October 2010
Figure 8
Figure 8
Figure 8
Figure 8
[2]
[2]
[2]
[2]
Figure
Min
2.4
1.6
1.4
1.1
1.0
2.3
1.9
1.7
1.4
1.3
3.3
2.3
2.0
1.7
1.5
4.5
3.4
2.6
2.3
2.2
-
-
-
-
9.
Typ
25 °C
16.8
20.3
23.8
34.1
5.1
3.6
3.0
2.4
2.1
5.9
4.2
3.5
2.9
2.7
6.7
4.8
4.0
3.3
3.1
9.0
6.3
5.3
4.4
4.2
[1]
Max
10.9
12.7
14.3
19.1
11.3
6.6
5.2
3.9
3.5
7.7
6.0
4.6
4.3
8.6
6.7
5.3
4.9
8.9
7.0
6.4
Low-power dual 2-input OR gate
-
-
-
-
Min
2.1
1.4
1.2
1.0
0.9
2.1
1.7
1.5
1.3
1.2
3.0
2.0
1.8
1.6
1.5
4.0
2.9
2.4
2.2
2.1
-
-
-
-
−40 °C to +125 °C
74AUP2G32
(85 °C)
Max
13.8
15.6
21.5
13.3
10.7
11.9
7.5
6.0
4.6
4.1
8.7
6.9
5.5
5.0
9.8
7.9
6.3
5.8
8.4
7.7
-
-
-
-
© NXP B.V. 2010. All rights reserved.
(125 °C)
Max
13.2
15.2
17.2
10.8
23.7
14.7
11.8
8.3
6.6
5.1
4.6
9.6
7.7
6.1
5.5
8.7
6.9
6.4
9.3
8.5
-
-
-
-
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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