MTD10N10ELT4G ONSEMI [ON Semiconductor], MTD10N10ELT4G Datasheet - Page 5

• Manufacturer Part Number: MTD10N10ELT4G
• Description: TMOS E−FET Power Field Effect Transistor DPAK for Surface Mount
• Manufacturer: ONSEMI [ON Semiconductor]

maximum simultaneous drain−to−source voltage and drain
current that a transistor can handle safely when it is forward
biased. Curves are based upon maximum peak junction
temperature and a case temperature (T
repetitive pulsed power limits are determined by using the
thermal response data in conjunction with the procedures
discussed in AN569, “Transient Thermal Resistance−General
Data and Its Use.”
traverse any load line provided neither rated peak current
(I
transition time (t
power averaged over a complete switching cycle must not
exceed (T
in switching circuits with unclamped inductive loads. For
DM
The Forward Biased Safe Operating Area curves define the
Switching between the off−state and the on−state may
A Power MOSFET designated E−FET can be safely used
12
8
4
0
) nor rated voltage (V
Figure 8. Gate−To−Source and Drain−To−Source
0
J(MAX)
Q
1
2
r
Voltage versus Total Charge
,t
− T
Q
f
Q
) do not exceed 10 ms. In addition the total
3
G
, TOTAL GATE CHARGE (nC)
C
)/(R
4
θJC
).
Q
Q
DSS
2
T
) is exceeded and the
DRAIN−TO−SOURCE DIODE CHARACTERISTICS
10
6
8
6
4
2
0
0.5
Figure 10. Diode Forward Voltage versus Current
C
) of 25°C. Peak
V
T
J
GS
= 25°C
V
= 0 V
V
DS
GS
8
V
SAFE OPERATING AREA
SD
0.6
T
I
D
J
, SOURCE−TO−DRAIN VOLTAGE (VOLTS)
= 10 A
= 25°C
http://onsemi.com
MTD10N10EL
10
90
75
60
45
30
15
0
0.7
5
reliable operation, the stored energy from circuit inductance
dissipated in the transistor while in avalanche must be less
than the rated limit and adjusted for operating conditions
differing from those specified. Although industry practice is
to rate in terms of energy, avalanche energy capability is not
a constant. The energy rating decreases non−linearly with an
increase of peak current in avalanche and peak junction
temperature.
drain−to−source avalanche at currents up to rated pulsed
current (I
continuous current (I
custom. The energy rating must be derated for temperature
as shown in the accompanying graph (Figure 12). Maximum
energy at currents below rated continuous I
assumed to equal the values indicated.
Although many E−FETs can withstand the stress of
1000
100
0.8
10
1
1
T
I
V
V
DM
D
J
DS
GS
= 10 A
= 25°C
= 100 V
= 5 V
), the energy rating is specified at rated
0.9
Figure 9. Resistive Switching Time
Variation versus Gate Resistance
t
t
R
d(on)
d(off)
G
t
f
t
, GATE RESISTANCE (OHMS)
D
r
1.0
), in accordance with industry
10
D
can safely be
1