74AUP2G240DC,125 NXP Semiconductors, 74AUP2G240DC,125 Datasheet - Page 2

IC INVERTER DUAL 1-INPUT 8VSSOP

74AUP2G240DC,125

Manufacturer Part Number
74AUP2G240DC,125
Description
IC INVERTER DUAL 1-INPUT 8VSSOP
Manufacturer
NXP Semiconductors
Series
74AUPr
Datasheet

Specifications of 74AUP2G240DC,125

Logic Type
Inverter
Number Of Inputs
1
Number Of Circuits
2
Current - Output High, Low
4mA, 4mA
Voltage - Supply
0.8 V ~ 3.6 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
8-VSSOP
Logic Family
AUP
Number Of Channels Per Chip
2
Polarity
Inverting
Supply Voltage (max)
3.6 V
Supply Voltage (min)
0.8 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
High Level Output Current
- 4 mA
Low Level Output Current
4 mA
Minimum Operating Temperature
- 40 C
Number Of Lines (input / Output)
2 / 2
Output Type
3-State
Propagation Delay Time
21.6 ns at 1.1 V to 1.3 V, 12.3 ns at 1.4 V to 1.6 V, 9.5 ns at 1.65 V to 1.95 V, 7.1 ns at 2.3 V to 2.7 V, 6.4 ns at 3 V to 3.6 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
74AUP2G240DC-G
74AUP2G240DC-G
935280736125
NXP Semiconductors
3. Ordering information
Table 1.
4. Marking
Table 2.
[1]
74AUP2G240
Product data sheet
Type number
74AUP2G240DC
74AUP2G240GT
74AUP2G240GF
74AUP2G240GD
74AUP2G240GM
74AUP2G240GN
74AUP2G240GS
Type number
74AUP2G240DC
74AUP2G240GT
74AUP2G240GF
74AUP2G240GD
74AUP2G240GM
74AUP2G240GN
74AUP2G240GS
The pin 1 indicator is located on the lower left corner of the device, below the marking code.
Ordering information
Marking codes
Package
Temperature range Name
−40 °C to +125 °C
−40 °C to +125 °C
−40 °C to +125 °C
−40 °C to +125 °C
−40 °C to +125 °C
−40 °C to +125 °C
−40 °C to +125 °C
All information provided in this document is subject to legal disclaimers.
VSSOP8
XSON8
XSON8
XSON8U
XQFN8U
XSON8
XSON8
Rev. 5 — 13 September 2010
Description
plastic very thin shrink small outline package; 8 leads;
body width 2.3 mm
plastic extremely thin small outline package; no leads;
8 terminals; body 1 × 1.95 × 0.5 mm
extremely thin small outline package; no leads;
8 terminals; body 1.35 × 1 × 0.5 mm
plastic extremely thin small outline package; no leads;
8 terminals; UTLP based; body 3 × 2 × 0.5 mm
plastic extremely thin quad flat package; no leads;
8 terminals; UTLP based; body 1.6 × 1.6 × 0.5 mm
extremely thin small outline package; no leads;
8 terminals; body 1.2 × 1.0 × 0.35 mm
extremely thin small outline package; no leads;
8 terminals; body 1.35 × 1.0 × 0.35 mm
Marking code
p40
p40
p2
p40
p40
p2
p2
Low-power dual inverting buffer/line driver; 3-state
[1]
74AUP2G240
© NXP B.V. 2010. All rights reserved.
Version
SOT765-1
SOT833-1
SOT1089
SOT996-2
SOT902-1
SOT1116
SOT1203
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