74AUP2G32GT,115 NXP Semiconductors, 74AUP2G32GT,115 Datasheet - Page 9
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74AUP2G32GT,115
Manufacturer Part Number
74AUP2G32GT,115
Description
IC OR GATE DUAL 2-IN 8-XSON
Manufacturer
NXP Semiconductors
Series
74AUPr
Datasheet
1.74AUP2G32DC125.pdf
(21 pages)
Specifications of 74AUP2G32GT,115
Number Of Circuits
2
Package / Case
8-XSON
Logic Type
OR Gate
Number Of Inputs
2
Current - Output High, Low
4mA, 4mA
Voltage - Supply
0.8 V ~ 3.6 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Logic Family
AUP
High Level Output Current
- 4 mA
Low Level Output Current
4 mA
Propagation Delay Time
19.1 ns
Supply Voltage (max)
3.6 V
Supply Voltage (min)
0.8 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
74AUP2G32GT-G
74AUP2G32GT-G
935280714115
74AUP2G32GT-G
935280714115
NXP Semiconductors
Table 8.
Voltages are referenced to GND (ground = 0 V); for test circuit see
[1]
[2]
[3]
12. Waveforms
Table 9.
74AUP2G32
Product data sheet
Symbol Parameter
C
C
Supply voltage
V
0.8 V to 3.6 V
Fig 8.
CC
L
PD
= 5 pF, 10 pF, 15 pF and 30 pF
All typical values are measured at nominal V
t
C
P
f
f
C
V
N = number of inputs switching;
Σ(C
pd
i
o
D
CC
PD
= input frequency in MHz;
L
= output frequency in MHz;
is the same as t
= output load capacitance in pF;
= C
L
is used to determine the dynamic power dissipation (P
= supply voltage in V;
× V
power dissipation
capacitance
Measurement points are given in
Logic levels: V
The data input (nA or nB) to output (nY) propagation delays
PD
Dynamic characteristics
Measurement points
CC
× V
2
× f
CC
o
2
) = sum of the outputs.
× f
PLH
i
× N + Σ(C
OL
and t
and V
PHL
Output
V
0.5 × V
OH
L
Conditions
f
M
.
i
× V
= 1 MHz; V
V
V
V
V
V
V
are typical output voltage levels that occur with the output load.
CC
CC
CC
CC
CC
CC
CC
nA, nB input
CC
nY output
2
…continued
= 0.8 V
= 1.1 V to 1.3 V
= 1.4 V to 1.6 V
= 1.65 V to 1.95 V
= 2.3 V to 2.7 V
= 3.0 V to 3.6 V
× f
Table
o
All information provided in this document is subject to legal disclaimers.
) where:
CC
I
9.
= GND to V
GND
.
V
V
OH
OL
V
I
Rev. 4 — 21 October 2010
Input
V
0.5 × V
M
D
CC
in μW).
V
M
CC
V
M
t
PHL
[3]
Figure
Min
-
-
-
-
-
-
9.
Typ
25 °C
2.6
2.7
2.7
2.9
3.3
3.7
V
V
I
CC
[1]
t
PLH
mna224
Max
Low-power dual 2-input OR gate
-
-
-
-
-
-
Min
-
-
-
-
-
-
−40 °C to +125 °C
74AUP2G32
(85 °C)
Max
t
≤ 3.0 ns
-
-
-
-
-
-
r
= t
© NXP B.V. 2010. All rights reserved.
f
(125 °C)
Max
-
-
-
-
-
-
Unit
pF
pF
pF
pF
pF
pF
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