k9k8g08u0m-y Samsung Semiconductor, Inc., k9k8g08u0m-y Datasheet - Page 19
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k9k8g08u0m-y
Manufacturer Part Number
k9k8g08u0m-y
Description
1g X 8 Bit / 2g X 8 Bit Nand Flash Memory
Manufacturer
Samsung Semiconductor, Inc.
Datasheet
1.K9K8G08U0M-Y.pdf
(49 pages)
- Current page: 19 of 49
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Interleave Page Program
K9K8G08U0M is composed of two K9F4G08U0Ms. K9K8G08U0M provides interleaving operation between two K9F4G08U0Ms.
This interleaving page program improves the system throughput almost twice compared to non-interleaving page program.
At first, the host issues page program command to one of the K9F4G08U0M chips, say K9F4G08U0M(chip #1). Due to this
K9K8G08U0M goes into busy state. During this time, K9F4G08U0M(chip #2) is in ready state. So it can execute the page program
command issued by the host.
After the execution of page program by K9F4G08U0M(chip #1), it can execute another page program regardless of the
K9F4G08U0M(chip #2). Before that the host needs to check the status of K9F4G08U0M(chip #1) by issuing F1h command. Only
when the status of K9F4G08U0M(chip #1) becomes ready status, host can issue another page program command. If the
K9F4G08U0M(chip #1) is in busy state, the host has to wait for the K9F4G08U0M(chip #1) to get into ready state.
Similarly, K9F4G08U0M chip(chip #2) can execute another page program after the completion of the previous program. The host can
monitor the status of K9F4G08U0M(chip #2) by issuing F2h command. When the K9F4G08U0M(chip #2) shows ready state, host
can issue another page program command to K9F4G08U0M(chip #2).
This interleaving algorithm improves the system throughput almost twice. The host can issue page program command to each chip
individually. This reduces the time lag for the completion of operation.
NOTES : During interleave operations, 70h command is prohibited.
K9WAG08U1M
K9K8G08U0M
19
FLASH MEMORY
Preliminary
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