CS4222-BS CIRRUS [Cirrus Logic], CS4222-BS Datasheet - Page 10

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CS4222-BS

Manufacturer Part Number
CS4222-BS
Description
20-Bit Stereo Audio Codec with Volume Control
Manufacturer
CIRRUS [Cirrus Logic]
Datasheet

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SWITCHING SPECIFICATIONS - CONTROL PORT INTERFACE (SPI)
Logic 0 = DGND, Logic 1 = VD)
Notes: 8. t
10
SPI Mode
CCLK Clock Frequency
RST Rising Edge to CS Falling
CCLK Edge to CS Falling
CS High Time Between Transmissions
CS Falling to CCLK Edge
CCLK Low Time
CCLK High Time
CDIN to CCLK Rising Setup Time
CCLK Rising to DATA Hold Time
Rise Time of CCLK and CDIN
Fall Time of CCLK and CDIN
10. For f
9. Data must be held for sufficient time to bridge the transition time of CCLK.
spi
only needed before first falling edge of CS after RST rising edge. t
sclk
< 1 MHz.
C C LK
C D IN
R S T
C S
Parameter
Figure 2. Control Port Timing - SPI Mode
t srs
t sp i
t r2
t css
t scl
t f2
t dsu t dh
(Note 10)
(Note 10)
(Note 8)
(Note 9)
t sch
Symbol
t
f
t
t
t
t
t
t
t
csh
sch
dsu
t
sck
css
t
srs
spi
scl
dh
r2
f2
Min
500
500
1.0
20
66
66
40
15
-
-
-
spi
t csh
= 0 at all other times.
Max
100
100
6
-
-
-
-
-
-
-
-
CS4222
(Inputs:
DS236F1
MHz
Unit
ns
ns
µs
ns
ns
ns
ns
ns
ns
ns

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