CS4222-BS CIRRUS [Cirrus Logic], CS4222-BS Datasheet - Page 27

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CS4222-BS

Manufacturer Part Number
CS4222-BS
Description
20-Bit Stereo Audio Codec with Volume Control
Manufacturer
CIRRUS [Cirrus Logic]
Datasheet

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DSP Port Mode Byte (5)
DEM2-0
DSCK
DDO
DDI2-DDI0
This register defaults to 00h.
Converter Status Report Byte (Read Only) (6)
ACCR-ACCL
LVL2-0,LVR2-0
LVL2-0 and LVR2-0 bits are 'sticky'. They constantly monitor the ADC output for the peak levels and hold the max-
This register is read only.
DS236F1
ACCR
DEM2
B7
B7
DEM1
ACCL
0 - De-emphasis controlled by pins
B6
B6
Selects de-emphasis control source
1 - 44.1 kHz de-emphasis setting
2 - 48 kHz de-emphasis setting
3 - 32 kHz de-emphasis setting
4 - De-emphasis disabled
5, 6, 7 - Not used
Sets the polarity of clocking data for both input and output
0 - Data valid on rising edge of SCLK
1 - Data valid on falling edge of SCLK
Data output format
0 - I
1 - Left justified
Data input format
0 - I
1 - Left justified
2 - Right justified, 20-bit
3 - Right justified, 18-bit
4 - Right justified, 16-bit
5, 6, 7 - Not used
Acceptance bit
0 - ATT7-0 has been accepted
1 - New setting waiting for zero crossing
Left and Right ADC output level
0 - Normal output levels
1 - -6 dB level
2 - -5 dB level
3 - -4 dB level
4 - -3 dB level
5 - -2 dB level
6 - -1 dB level
7 - Clipping
imum output. They are reset to 0 when the DSP Port Mode Byte (5) is read.
2
2
S compatible
S compatible
DEM0
LVR2
B5
B5
DSCK
LVR1
B4
B4
LVR0
DDO
B3
B3
DDF2
LVL2
B2
B2
DDF1
LVL2
B1
B1
CS4222
DDF0
LVL0
B0
B0
27

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