CS47014-CVZR CIRRUS [Cirrus Logic], CS47014-CVZR Datasheet - Page 15

• Manufacturer Part Number: CS47014-CVZR
• Description: High Definition Audio Decoder DSP Family with Dual 32-bit DSP Engine Technology
• Manufacturer: CIRRUS [Cirrus Logic]

5.12 Switching Characteristics — Serial Control Port - I
DS752PP8
SCP_CLK frequency
SCP_CLK low time
SCP_CLK high time
SCP_SCK rising to SCP_SDA rising or falling for START
or STOP condition
START condition to SCP_CLK falling
SCP_CLK falling to STOP condition
Bus free time between STOP and START conditions
Setup time SCP_SDA input valid to SCP_CLK rising
Hold time SCP_SDA input after SCP_CLK falling
SCP_CLK low to SCP_SDA out valid
SCP_CLK falling to SCP_IRQ# rising
NAK condition to SCP_IRQ# low
SCP_CLK rising to SCB_BSY# low
.
1. The specification f
SCP_MISO
SCP_MOSI
SCP_CLK
the actual maximum speed of the communication port may be limited by the firmware application. Flow control
using the SCP_BSY# pin should be implemented to prevent overflow of the input data buffer.
EE_CS#
t
spicsl
1
Parameter
iicck
f
spisck
t
spicss
indicates the maximum speed of the hardware. The system designer should be aware that
A6
t
spidsu
0
Figure 4. Serial Control Port - SPI Master Mode Timing
A5
t
1
spidh
Copyright 2009 Cirrus Logic
2
t
spickh
t
spickl
A0
6
t
spidov
Symbol
t
iicckcmd
t
t
t
t
t
t
t
t
f
iicstscl
t
iicbsyl
t
iicirqh
iicckh
iicdov
iicirql
iicckl
iicstp
iicbft
t
iicck
iicsu
iich
R/W
7
MSB
MSB
Min
1.25
1.25
1.25
1.25
100
2.5
20
3
-
-
-
-
0
32-bit High Definition Audio Decoder DSP Family
2
C Slave Mode
3
3
*
*
5
DCLKP + 20
DCLKP + 20
Typical
6
LSB
LSB
7
3
*
DCLKP + 40
Max
400
18
CS4970x4 Data Sheet
-
-
-
-
-
-
t
spidz
t
t
spicsx
spicsh
Units
kHz
µs
µs
µs
µs
µs
µs
ns
ns
ns
ns
ns
ns
15