IR3623MPBF_1 IRF [International Rectifier], IR3623MPBF_1 Datasheet - Page 16

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IR3623MPBF_1

Manufacturer Part Number
IR3623MPBF_1
Description
HIGH FREQUENCY 2-PHASE, SINGLE OR DUAL OUTPUT SYNCHRONOUS STEP DOWN CONTROLLER WITH OUTPUT TRACKING AND SEQUENCING
Manufacturer
IRF [International Rectifier]
Datasheet
Ph_En and Pre-Bias
For a correct start up the driver section needs to
be powered up before the PWM signal is applied.
IR3623 features a dedicated pin (Ph_En) which
can be used for this purposes. Figure 22 shows
how this pin is used to enable power stage
modules. During normal start up the PWM is in
Tri-state mode until the Ph_En goes high, each
channel has it’s own Ph_En pins.
During the Pre-Bias start up the Ph_En is kept
low and the PWM output is in Tri-state mode.
The Ph_En will be enabled as soon as the
internal PWM signal is generated.
Over Voltage Protection
Over-voltage is sensed through two dedicated
sense pins V
is provided for each channel.
The OVP threshold is user programmable and
can be set by two external resistors. Upon over-
voltage condition of either one of the outputs, the
OVP forces a latched shutdown on the fault
output and pulls low the PWM signal.
IR3623 features an OVP output signal, high
status of this pin indicates the OVP event for
either of the channels. This pin has 10mA current
capability which can be used to drive an external
switch.
Reset is performed by recycling the Vcc or
Enable.
Power Good
The IR3623 provides two separate open collector
power good signals which report the status of the
outputs. The outputs are sensed through the two
dedicated V
Once the IR3623 is enabled and the outputs
reach the set value (90% of set value) the power
good signals go open and stay open as long as
the outputs stay within the set values.
These pins need to be externally pulled high.
Shutdown using Soft Start pins
The outputs can be shutdown by pulling the soft-
start pin below 0.3V. This can be easily done by
using an external small signal transistor. During
shutdown both MOSFET drivers will be turned
off. Normal operation will resume by cycling soft
start pin.
www.irf.com
SEN1
SEN1
and V
, V
SEN2
SEN2
. A separate OVP circuit
pins.
Operating Frequency Selection
The switching frequency is determined by
connecting an external resistor (Rt) to ground.
Figure 16 provides a graph of oscillator
frequency
recommended channel frequency is 1.2MHz.
Frequency Synchronization
The IR3623 is capable of accepting an external
digital synchronization signal. Synchronization
will be enabled by the rising edge at an external
clock. Per –channel switching frequency is set
by external resistor (Rt). The free running
frequency oscillator frequency is twice the per-
channel frequency. During synchronization, Rt is
selected such that the free running frequency is
20% below the synchronization frequency.
Synchronization capability is provided for both
single output current share mode and dual
output
pin will remain floating and is noise immune.
Thermal Shutdown
Temperature sensing is provided inside IR3623.
The trip threshold is typically set to 135
When trip threshold is exceeded, thermal
shutdown turns off both MOSFETs. Thermal
shutdown is not latched and automatic restart is
initiated when the sensed temperature drops to
normal range. There is a 20
shutdown threshold.
Fig. 16: Switching Frequency vs. External Resistor (R
1300
1200
1100
1000
900
800
700
600
500
400
300
200
100
0
configuration. When unused, the sync
25
versus
50
Switching Frequency vs R
75
100
R
T
(kOhm)
Rt.
IR3623MPbF
125
o
C hysteresis in the
The
150
T
175
maximum
200
225
o
C.
16
t
)

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